
K7N403609B
128Kx36/x32 & 256Kx18 Pipelined NtRAMTM
- 4 -
Rev 1.0
November 2001
K7N401809B
K7N403209B
PIN CONFIGURATION(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100 Pin TQFP
(20mm x 14mm)
DQPc/NC
DQc0
DQc1
VDDQ
VSSQ
DQc2
DQc3
DQc4
DQc5
VSSQ
VDDQ
DQc6
DQc7
VDD
VSS
DQd0
DQd1
VDDQ
VSSQ
DQd2
DQd3
DQd4
DQd5
VSSQ
VDDQ
DQd6
DQd7
DQPd/NC
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
DQPb/NC
DQb7
DQb6
VDDQ
VSSQ
DQb5
DQb4
DQb3
DQb2
VSSQ
VDDQ
DQb1
DQb0
VSS
VDD
ZZ
DQa7
DQa6
VDDQ
VSSQ
DQa5
DQa4
DQa3
DQa2
VSSQ
VDDQ
DQa1
DQa 0
DQPa/NC
1
0
9
8
9
7
9
6
9
5
9
4
9
3
9
2
9
1
9
0
8
9
8
7
8
6
8
5
8
4
8
3
8
2
A
6
A
7
C
S
1
C
S
2
B
W
d
B
W
c
B
W
b
B
W
a
C
S
2
V
D
V
S
C
L
K
W
E
C
K
E
O
E
A
D
V
N
.C
.
N
.C
.
A
8
1
A
9
5
0
4
9
4
8
4
7
4
6
4
5
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
2
A
1
6
A
1
5
A
1
4
A
1
3
A
1
2
A
1
A
1
0
N
.C
.
N
.C
.
V
D
V
S
N
.C
.
N
.C
.
A
0
A
1
A
2
A
3
A
4
A
5
3
1
L
B
O
PIN NAME
Notes : 1. The pin 83 is reserved for address bit for the 8Mb NtRAM.
2. A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.
3. DQPa~Pd pins are NC for K7N403209B
SYMBOL
PIN NAME
TQFP PIN NO.
SYMBOL
PIN NAME
TQFP PIN NO.
A0 - A16
ADV
WE
CLK
CKE
CS1
CS2
BWx(x=a,b,c,d)
OE
ZZ
LBO
Address Inputs
Address Advance/Load
Read/Write Control Input
Clock
Clock Enable
Chip Select
Byte Write Inputs
Output Enable
Power Sleep Mode
Burst Mode Control
32,33,34,35,36,37
44,45,46,47,48,49
50,81,82,99,100
85
88
89
87
98
97
92
93,94,95,96
86
64
31
VDD
VSS
N.C.
DQa0~a7
DQb0~b7
DQc0~c7
DQd0~d7
DQPa~Pd
/NC
VDDQ
VSSQ
Power Supply(+3.3V)
Ground
No Connect
Data Inputs/Outputs
Output Power Supply
(2.5V or 3.3V)
Output Ground
14,15,16,41,65,66,91
17,40,67,90
38,39,42,43,83,84
52,53,56,57,58,59,62,63
68,69,72,73,74,75,78,79
2,3,6,7,8,9,12,13
18,19,22,23,24,25,28,29
51,80,1,30
4,11,20,27,54,61,70,77
5,10,21,26,55,60,71,76
K7N403609B(128Kx36)
K7N403209B(128Kx32)