参数资料
型号: KMPC8377EVRALG
厂商: Freescale Semiconductor
文件页数: 52/127页
文件大小: 0K
描述: IC MPU POWERQUICC II 689-PBGA
标准包装: 2
系列: MPC83xx
处理器类型: 32-位 MPC83xx PowerQUICC II Pro
速度: 667MHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 689-BBGA 裸露焊盘
供应商设备封装: 689-TEPBGA II(31x31)
包装: 托盘
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
30
Freescale Semiconductor
8.2.3.2
RMII Receive AC Timing Specifications
This table shows the RMII receive AC timing specifications.
This figure provides the AC test load for eTSEC.
Figure 13. eTSEC AC Test Load
Table 30. RMII Receive AC Timing Specifications
At recommended operating conditions with LVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol1
Min
Typical
Max
Unit
Input low voltage at 3.3 LVDD
VIL
——
0.8
V
Input high voltage at 3.3 LVDD
VIH
2.0
V
REF_CLK clock period
tRMR
15.0
20.0
25.0
ns
REF_CLK duty cycle
tRMRH
35
50
65
%
REF_CLK peak-to-peak jitter
tRMRJ
250
ps
Rise time REF_CLK (20%–80%)
tRMRR
1.0
2.0
ns
Fall time REF_CLK (80%–20%)
tRMRF
1.0
2.0
ns
RXD[1:0], CRS_DV, RX_ER setup time to REF_CLK rising edge
tRMRDV
4.0
ns
RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK rising edge
tRMRDX
2.0
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMRDVKH
symbolizes MII receive timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the
tMRX clock reference (K) going to the high (H) state or setup time. Also, tMRDXKL symbolizes MII receive timing (GR) with
respect to the time data input signals (D) went invalid (X) relative to the tMRX clock reference (K) going to the low (L) state
or hold time. Note that, in general, the clock reference symbol representation is based on three letters representing the clock
of a particular functional. For example, the subscript of tMRX represents the MII (M) receive (RX) clock. For rise and fall times,
the latter convention is used with the appropriate letter: R (rise) or F (fall).
Output
Z0 = 50 Ω
LVDD/2
RL = 50 Ω
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