参数资料
| 型号： | KSZ8031RNL |
| 厂商： | Micrel Inc |
| 文件页数： | 8/43页 |
| 文件大小： | 0K |
| 描述： | TXRX PHY 100BASE TX 3.3V 24QFN |
| 标准包装： | 75 |
| 类型： | PHY 收发器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | RMII |
| 电源电压： | 1.8V，2.5V，3.3V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（4x4） |
| 包装： | 管件 |
| 配用： | 576-3862-ND - BOARD EVALUATION FOR KSZ8031RNL |
| 其它名称： | 576-3741-5 |
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Micrel, Inc.
KSZ8021RNL / KSZ8031RNL
August 2010
16
M9999-082710-1.0
So long as carrier detection criteria are met, CRS_DV remains asserted continuously from the first recovered dibit of the
frame through the final recovered dibit, and it is negated prior to the first REF_CLK that follows the final dibit. The data on
RXD[1:0] is considered valid once CRS_DV is asserted. However, since the assertion of CRS_DV is asynchronous
relative to REF_CLK, the data on RXD[1:0] is "00" until proper receive signal decoding takes place.
Receive Data [1:0] (RXD[1:0])
RXD[1:0] transitions synchronously with respect to REF_CLK. For each clock period in which CRS_DV is asserted,
RXD[1:0] transfers two bits of recovered data from the PHY.
RXD[1:0] is "00" to indicate idle when CRS_DV is de-asserted. Values other than “00” on RXD[1:0] while CRS_DV is de-
asserted are ignored by the MAC.
Receive Error (RXER)
RXER is asserted for one or more REF_CLK periods to indicate that a Symbol Error (e.g., a coding error that a PHY is
capable of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the
frame presently being transferred from the PHY.
RXER transitions synchronously with respect to REF_CLK. While CRS_DV is de-asserted, RXER has no effect on the
MAC.
Collision Detection
The MAC regenerates the COL signal of the MII from TXEN and CRS_DV.
RMII Signal Diagram – for KSZ8021/31RNL
The KSZ8021/31RNL RMII pin connections to the MAC are shown in the following figures for RMII – 25MHz Clock Mode
and RMII – 50MHz Clock Mode.
RMII – 25MHz Clock Mode
The KSZ8031RNL is configured to RMII – 25MHz Clock Mode after it is powered up or hardware reset with the following:
A 25MHz crystal connected to XI, XO (Pins 8, 7), or an external 25MHz clock source (oscillator) connected to XI
The KSZ8021RNL is configured optionally to RMII – 25MHz Clock Mode after it is powered up or hardware reset and
software programmed with the following:
A 25MHz crystal connected to XI, XO (pins 8, 7), or an external 25MHz clock source (oscillator) connected to XI
Register 1Fh, bit [7] programmed to ‘0’ to select RMII – 25MHz Clock Mode
Figure 2. KSZ8021/31RNL RMII Interface (RMII – 25MHz Clock Mode)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KSZ8031RNL TR | 功能描述:以太网 IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (24-QFN) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8031RNL-EVAL | 功能描述:以太网开发工具 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (24-QFN) - Evaluation Board RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
| KSZ8031RNLI | 功能描述:TXRX PHY 10/100 3.3V 24-QFN RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,140 系列:AU 类型:收发器 驱动器/接收器数:1/1 规程:CAN 电源电压:5.3 V ~ 27 V 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 供应商设备封装:14-SO 包装:管件 其它名称:935267940512AU5790D14AU5790D14-ND |
| KSZ8031RNLI TR | 功能描述:以太网 IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (24-QFN, Industrial Grade) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8031RNLITR | 制造商:Micrel Inc 功能描述:Ethernet transceiver,PHY,RMII,QFN24 |
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