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参数资料
| 型号： | KSZ8041RNL-EVAL |
| 厂商： | Micrel Inc |
| 文件页数： | 5/54页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR KSZ8041RNL |
| 标准包装： | 1 |
| 主要目的： | 接口，以太网 PHY |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8041RNL |
| 主要属性： | 单芯片 PHY，10BASE-T/100BASE-TX |
| 已供物品： | 板 |
| 相关产品： | 576-3979-2-ND - IC TXRX PHY 10/100 3.3V 32MLF 576-3745-6-ND - TXRX PHY 100BASE TX 3.3V 32QFN 576-3745-1-ND - TXRX PHY 100BASE TX 3.3V 32QFN 576-3745-2-ND - TXRX PHY 100BASE TX 3.3V 32QFN 576-3623-6-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF 576-3623-1-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF 576-3623-2-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF 576-3503-ND - TXRX 10/100 3.3V PHY RMII 32-MLF |
| 其它名称： | 576-3863 |
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Micrel, Inc.
KSZ8041NL/RNL
September 2010
13
M9999-090910-1.4
Pin Description – KSZ8041NL (Continued)
Pin Number
Pin Name
Type
(1)
Pin Function
31
LED1 /
SPEED
Ipu/O
LED Output:
Programmable LED1 Output /
Config Mode:
Latched as SPEED (register 0h, bit 13) during power-up / reset.
See “Strapping Options” section for details.
The LED1 pin is programmable via register 1Eh bits [15:14], and is defined as
follows.
LED mode = [00]
Speed
Pin State
LED Definition
10BT
H
OFF
100BT
L
ON
LED mode = [01]
Activity
Pin State
LED Definition
No Activity
H
OFF
Activity
Toggle
Blinking
LED mode = [10]
Reserved
LED mode = [11]
Reserved
32
RST#
I
Chip Reset (active low)
PADDLE
GND
Gnd
Ground
Notes:
1. P = Power supply.
Gnd = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Ipd = Input with internal pull-down (40K +/-30%).
Ipu = Input with internal pull-up (40K +/-30%).
Opu = Output with internal pull-up (40K +/-30%).
Ipu/O = Input with internal pull-up (40K +/-30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (40K +/-30%) during power-up/reset; output pin otherwise.
2. MII Rx Mode: The RXD[3..0] bits are synchronous with RXCLK. When RXDV is asserted, RXD[3..0] presents valid data to MAC through the
MII. RXD[3..0] is invalid when RXDV is de-asserted.
3. RMII Rx Mode: The RXD[1:0] bits are synchronous with REF_CLK. For each clock period in which CRS_DV is asserted, two bits of
recovered data are sent from the PHY.
4. MII Tx Mode: The TXD[3..0] bits are synchronous with TXCLK. When TXEN is asserted, TXD[3..0] presents valid data from the MAC through
the MII. TXD[3..0] has no effect when TXEN is de-asserted.
5. RMII Tx Mode: The TXD[1:0] bits are synchronous with REF_CLK. For each clock period in which TX_EN is asserted, two bits of data are
received by the PHY from the MAC.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KSZ8041RNLI | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:10Base-T/100Base-TX Physical Layer Transceiver |
| KSZ8041RNLI TR | 功能描述:以太网 IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with RMII Support (Industrial grade) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8041RNLI TR-SAMPLE | 制造商:Micrel Inc 功能描述: |
| KSZ8041RNLI-TR | 功能描述:1/1 Transceiver Full RMII 32-MLF? (5x5) 制造商:microchip technology 系列:- 包装:剪切带（CT） 零件状态:有效 类型:收发器 协议:RMII 驱动器/接收器数:1/1 双工:全 接收器滞后:- 数据速率:- 电压 - 电源:3.135 V ~ 3.465 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘，32-MLF? 供应商器件封装:32-MLF?（5x5） 标准包装:1 |
| KSZ8041RNLTR | 制造商:Micrel 功能描述:Physical Layer Transceiver |
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