参数资料
型号: KSZ8851-16MLL TR
厂商: Micrel Inc
文件页数: 59/84页
文件大小: 0K
描述: IC MAC CTLR 1PORT W/BUS 48LQFP
产品培训模块: KSZ8851 10/100 Embedded Controllers
标准包装: 1,000
控制器类型: 以太网控制器,MAC/PHY
接口: 总线
电源电压: 1.8V,2.5V,3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
PIC16F7X
DS30325B-page 60
2002 Microchip Technology Inc.
REGISTER 9-1:
SSPSTAT: SYNC SERIAL PORT STATUS REGISTER (ADDRESS 94h)
R/W-0
R-0
SMP
CKE
D/A
PS
R/W
UA
BF
bit 7
bit 0
bit 7
SMP: SPI Data Input Sample Phase bit
SPI Master mode:
1
= Input data sampled at end of data output time
0
= Input data sampled at middle of data output time (Microwire)
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
I2C mode:
This bit must be maintained clear
bit 6
CKE: SPI Clock Edge Select bit (Figure 9-2, Figure 9-3, and Figure 9-4)
SPI mode, CKP = 0:
1
= Data transmitted on rising edge of SCK (Microwire alternate)
0
= Data transmitted on falling edge of SCK
SPI mode, CKP = 1:
1
= Data transmitted on falling edge of SCK (Microwire default)
0
= Data transmitted on rising edge of SCK
I2C mode:
This bit must be maintained clear
bit 5
D/A: Data/Address bit (I2C mode only)
1
= Indicates that the last byte received or transmitted was data
0
= Indicates that the last byte received or transmitted was address
bit 4
P: STOP bit (I2C mode only)
This bit is cleared when the SSP module is disabled, or when the START bit is detected last.
SSPEN is cleared.
1
= Indicates that a STOP bit has been detected last (this bit is ’0’ on RESET)
0
= STOP bit was not detected last
bit 3
S: START bit (I2C mode only)
This bit is cleared when the SSP module is disabled, or when the STOP bit is detected last.
SSPEN is cleared.
1
= Indicates that a START bit has been detected last (this bit is ’0’ on RESET)
0
= START bit was not detected last
bit 2
R/W: Read/Write bit Information (I2C mode only)
This bit holds the R/W bit information following the last address match. This bit is only valid from
the address match to the next START bit, STOP bit, or ACK bit.
1
= Read
0 = Write
bit 1
UA: Update Address bit (10-bit I2C mode only)
1
= Indicates that the user needs to update the address in the SSPADD register
0
= Address does not need to be updated
bit 0
BF: Buffer Full Status bit
Receive (SPI and I2C modes):
1
= Receive complete, SSPBUF is full
0
= Receive not complete, SSPBUF is empty
Transmit (I2C mode only):
1
= Transmit in progress, SSPBUF is full
0
= Transmit complete, SSPBUF is empty
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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