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参数资料
| 型号： | KSZ9021GN |
| 厂商： | Micrel Inc |
| 文件页数： | 5/53页 |
| 文件大小： | 0K |
| 描述： | TXRX ETHERNET GB GMII/MII 64-MLF |
| 标准包装： | 348 |
| 类型： | 收发器 |
| 驱动器/接收器数： | 8/8 |
| 规程： | 千兆位以太网 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（8x8） |
| 包装： | 托盘 |
| 配用： | 576-3873-ND - BOARD EVALUATION FOR KSZ9021GN |
| 其它名称： | 576-3635 KSZ9021GN-ND |
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Micrel, Inc.
KSZ9021GN
September 2010
13
M9999-091010-1.1
Pin Number
Pin Name
Type
(1)
Pin Function
51
MDIO
Ipu/O
Management Data Input / Output
This pin is synchronous to MDC (pin 50) and requires an external pull-up resistor
to DVDDH (digital VDD) in a range from 1.0KΩ to 4.7KΩ.
52
COL
O
GMII Mode:
GMII COL (Collision Detected) Output
MII Mode:
MII COL (Collision Detected) Output
53
INT_N
O
Interrupt Output
This pin provides a programmable interrupt output and requires an external pull-up
resistor to DVDDH (digital VDD) in a range from 1.0KΩ to 4.7KΩ when active low.
Register 1Bh is the Interrupt Control/Status Register for programming the interrupt
conditions and reading the interrupt status. Register 1Fh bit 14 sets the interrupt
output to active low (default) or active high.
54
DVDDL
P
1.2V digital VDD
55
CLK125_NDO /
LED_MODE
I/O
125MHz Clock Output
This pin provides a 125MHz reference clock output option for use by the MAC. /
Config Mode:
The pull-up/pull-down value is latched as LED_MODE during
power-up / reset. See “Strapping Options” section for details.
56
RESET_N
Ipu
Chip Reset (active low)
Hardware pin configurations are strapped-in at the de-assertion (rising edge) of
RESET_N. See “Strapping Options” section for more details.
57
TX_CLK
O
MII Mode:
MII TX_CLK (Transmit Reference Clock) Output
58
LDO_O
O
On-chip 1.2V LDO Controller Output
This pin drives the input gate of a P-channel MOSFET to generate 1.2V for the
chip’s core voltages. If 1.2V is provided by the system and this pin is not used, it
can be left floating.
59
AVDDL_PLL
P
1.2V analog VDD for PLL
60
XO
O
25MHz Crystal feedback
This pin is a no connect if oscillator or external clock source is used.
61
XI
I
Crystal / Oscillator / External Clock Input
25MHz +/-50ppm tolerance
62
AVDDH
P
3.3V analog VDD
63
ISET
I/O
Set transmit output level
Connect a 4.99K
Ω 1% resistor to ground on this pin.
64
AGNDH
Gnd
Analog ground
PADDLE
P_GND
Gnd
Exposed Paddle on bottom of chip
Connect P_GND to ground.
Note:
1. P = Power supply.
Gnd = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Ipu = Input with internal pull-up.
Ipu/O = Input with internal pull-up / Output.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KSZ9021GN TR | 功能描述:以太网 IC Gigabit Ethernet Transceiver with GMII/MII RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ9021GN-EVAL | 功能描述:以太网开发工具 Gigabit Ethernet Transceiver with GMII/MII - Evaluation Board RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
| KSZ9021GNI | 功能描述:以太网 IC Gigabit Ethernet Transceiver with GMII/MII, I-Temp RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ9021GQ | 功能描述:以太网 IC Gigabit Ethernet Transceiver with GMII/MII, Lead Free RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ9021GQI | 功能描述:以太网 IC Gigabit Ethernet Transceiver w/ GMII/MII, I-Temp RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
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