8
L64015 VMI Bridge
HD[15:0]
Host Data [15:0]
Input/Output
HD[15:0] is the 16-bit bidirectional data bus. HD15 is the
most-signicant bit.
VMIAE_N
VMI Address Enable
Input
The host asserts this input LOW to inform the L64015
that the address on HA[3:0] is valid for a host read or
write of the L64015.
VMICS_N
VMI Device Chip Select
Input
The host asserts this input LOW when accessing the
L64015.
VMIIRQ_N
VMI Interrupt Request
Output
The L64015 asserts this signal LOW to inform the VMI
host that the VMI card needs service.
VMIRD_N
VMI I/O Read
Input
The VMI host asserts this signal LOW to read data from
the VMI card’s I/O registers. VMICS_N or VMIAE_N must
be asserted at the same time.
VMIRESET
VMI Reset
Input
Asserting this signal HIGH clears all L64015 registers
and returns the L64015 to its original uncongured state
that existed prior to initialization.
VMIWAIT_N
VMI Wait
Output
The L64015 asserts this signal LOW to delay completion
of a memory or I/O access cycle currently in progress.
VMIWR_N
VMI I/O Write
Input
The VMI host asserts this signal LOW to write data to the
VMI card’s I/O registers. VMICS_N or VMIAE_N must be
asserted at the same time.
L64020 DVD Decoder Interface
ACLK
Decoder Audio Master Clock
Input
ACLK is an audio output clock from the DVD Decoder.
AD[8:0]
Decoder Address/Data [8:0]
Input/Output
AD[8:0] functions as a nine-bit address bus, an eight-bit
host data bus, or an eight-bit channel data bus.