
8-48
Video Decoder Module
Frame I3 of the new sequence gets decoded but has to be kept in the
frame store until the rst eld of frame P6 is decoded. So, the Video
Decoder repeats frame P2.
In case 2, the new sequence does not arrive until some time after the
Sequence End Code, so frame P2 has to be repeated several times.
Case 3 shows a bitstream with single pictures in the sequences and
intentional delays between sequence ends and starts. The single
pictures are continuously repeated between sequences.
Case 4 shows the situation where the host has ordered a continuous skip
of B pictures and skips three of them immediately before a Sequence
End Code.
Since there is likely to be a delay between a Sequence End Code and
the next Sequence Start, it is practical to display the last anchor picture
at the sequence end instead of waiting for the rst anchor picture in the
new sequence. In Rip Forward Mode, the decoder stalls at the Sequence
End Code until the Rip Forward Single Step Command bit in
As described, the last anchor picture in a sequence is displayed after the
Sequence End Code is detected and is treated as a still picture until the
next Sequence Start Code. If the host sets the Ignore Sequence End bit
in Register 239 (
page 4-76), the last picture in the current sequence is
not displayed until after the next Sequence Start Code. This feature is
useful when the delay between sequences is short and adding the extra
display time could interfere with the synchronization of video and audio
processing.
8.6 Error Handling and Concealment
The L64021 can detect multiple errors in the bitstream. The decoder tries
to conceal any errors found. This is usually done with the help of
concealment motion vectors if they are present in the bitstream.
Concealing errors helps minimize their effects and helps the decoder
resynchronize to the bitstream as soon as possible.