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参数资料
| 型号： | L6670 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封装： | SO-24 |
| 文件页数： | 5/9页 |
| 文件大小： | 73K |
| 代理商： | L6670 |
5/9
L6670
SERIAL PORT, REGISTERS, EPROM and TEST MODES
1.
SERIAL PORT
1.1 READ & WRITE REGISTER
Figure 2.
SPE is the Serial Port Enable. It goes high at the start of the transmission and goes back low at the end. SPC
is the Serial Port Clock. It is stopped high when SPE is low (no transmission). SPD is the Serial Port Data. It is
driven by the falling edge of SPC. It should be captured at the rising edge of SPC.
The Read Register or Write Register command consists of 16 clocks or bits. A bit duration is the time between
two falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the rising edge of SPE
and the last bit (bit 15) starts at the last falling edge of SPC just before the falling edge of SPE.
s
bit 0 : RW bit. When 0, the data (D7:0) is written into the MU05. When 1, the data (D7:0) from the
MU05 is read. In this case, the MU05 will drive SPD at the start of bit 8.
s
bit 1-3 : chip ID. The chip ID for the MU05 is ID(2:0)=110. The MU05 accepts the command only when
the ID is valid (equal to 110).
s
bit 4-7 : address AD(3:0). This is the address field for the registers. See section 2 for more details.
s
bit 8-15 : data D(7:0). This is the data that will be written (read) into (from) the register which address is
AD(3:0).
1.2 READ FIFO
Figure 3.
SPE
SPC
SPD
RW
ID2
ID1
ID0
AD3
AD2
AD1
AD0
D7
D6
D5
D4
D3
D2
D1
D0
D00IN1119
SPE
SPC
SPD
RW
ID2
ID1
ID0
AD3
AD2
AD1
AD0
D7-0
D6-0
.....
D0-0
D7-1
D6-1
.....
D0-1
D00IN1120
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