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参数资料
| 型号： | L6910GTR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 稳压器 |
| 英文描述： | 1.3 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | SO-16 |
| 文件页数： | 10/26页 |
| 文件大小： | 1046K |
| 代理商： | L6910GTR |
L6910G
18/26
8
APPLICATION IDEA 1: DDR MEMORY AND TERMINATION SUPPLY
Double Data Rate (DDR) Memories require a particular Power Management Architecture. This is due to the fact
that the trace between the driving chipset and the memory input must be terminated with resistors.
Since the Chipset driving the Memory has a push pull output buffer, the Termination voltage must be capable
of sourcing and sinking current.
Moreover, the Termination voltage must be equal to one half of the memory supply (the input of the memory is
a differential stage requiring a reference bias midpoint) and in tracking with it. For DDRI the Memory Supply is
2.5V and the Termination voltage is 1.25V while, for DDRII, the Memory Supply is 1.8V and the Termination
voltage is 0.9V. Fig. 23 shows a complete DDRI Memory and Termination Power Supply realized by using 2 x
L6910G. The 2.5V section is powering the memory while the 1.25V section is providing the termination voltage.
The tracking between the two sections is realized by providing the EAREF voltage of the 1.25V section through
a resistor divider connected to the 2.5V.
Figure 21. Application idea : DDR Memory Supply
The current required by the memory and the termination supply, depends on the memory type and size.
The figure 22, 23 shows the efficiency of the L6910G for the termination section of the application shown in fig.
21, in sink and source mode. The figures show the efficiency values also when the input voltage is coming di-
rectly from the 12V rail.
VREF
13
14
10
11
3
1
6
12
5
4
2
15
7
9
VCC
GND
VREF
SS
OSC
OCSET
UGATE
PHASE
LGATE
PGND
PGOOD
VF
B
CO
M
P
VIN
12V
8
EAREF
BOOT
13
14
10
11
3
1
PWRGD
6
12
5
4
2
15
7
9
VCC
GND
VREF
SS
OSC
OCSET
UGATE
PHASE
LGATE
PGND
PGOOD
VF
B
CO
M
P
8
EAREF
BOOT
STS8DNF3LL
STS11NF3LL
R
+
-
V
DDQ
2.5V@15A
V
TT
1.25V@ - 5A
VIN
12V
U1
L6910
U2
L6910
PWRGD
R
TERMINATION
NETWORK
BU
S
STS11NF3LL
DDR
MEMORY
CHIPSET
+
VREF
13
14
10
11
3
1
6
12
5
4
2
15
7
9
VCC
GND
VREF
SS
OSC
OCSET
UGATE
PHASE
LGATE
PGND
PGOOD
VF
B
CO
M
P
VIN
12V
8
EAREF
BOOT
13
14
10
11
3
1
PWRGD
6
12
5
4
2
15
7
9
VCC
GND
VREF
SS
OSC
OCSET
UGATE
PHASE
LGATE
PGND
PGOOD
VF
B
CO
M
P
8
EAREF
BOOT
STS8DNF3LL
STS11NF3LL
R
+
-
V
DDQ
2.5V@15A
V
TT
1.25V@ - 5A
VIN
12V
U1
L6910
U2
L6910
PWRGD
R
TERMINATION
NETWORK
BU
S
STS11NF3LL
DDR
MEMORY
CHIPSET
+
VREF
13
14
10
11
3
1
6
12
5
4
2
15
7
9
VCC
GND
VREF
SS
OSC
OCSET
UGATE
PHASE
LGATE
PGND
PGOOD
VF
B
CO
M
P
VIN
12V
8
EAREF
BOOT
13
14
10
11
3
1
PWRGD
6
12
5
4
2
15
7
9
VCC
GND
VREF
SS
OSC
OCSET
UGATE
PHASE
LGATE
PGND
PGOOD
VF
B
CO
M
P
8
EAREF
BOOT
STS8DNF3LL
STS11NF3LL
R
+
-
V
DDQ
2.5V@15A
V
TT
1.25V@ - 5A
VIN
12V
U1
L6910
U2
L6910
PWRGD
R
TERMINATION
NETWORK
BU
S
STS11NF3LL
DDR
MEMORY
CHIPSET
+
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相关代理商/技术参数 |
参数描述 |
|---|---|
| L6910R | 功能描述:DC/DC 开关控制器 5.0 to 12V Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| L6910RTR | 功能描述:DC/DC 开关控制器 5.0 to 12V Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| L6910S | 功能描述:DC/DC 开关控制器 5.0 to 12V Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| L6910STR | 功能描述:DC/DC 开关控制器 5.0 to 12V Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| L6910TR | 功能描述:DC/DC 开关控制器 5.0 to 12V Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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