参数资料
型号: L6917D
厂商: STMICROELECTRONICS
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO28
封装: SO-28
文件页数: 10/27页
文件大小: 411K
代理商: L6917D
L6917
18/27
Figure 11. Control Loop Scheme
Average Current Mode Compensation Network Design
The average current mode control loop is reported in figure 11. The current information IFB sourced by the FB
pin flows into RFB implementing the dependence of the output voltage from the read current.
Two different loops are present and precisely a current loop internal to a voltage loop. The current gain (Ac) and
voltage gain (Av) present in the above figure are defined by the following relationships:
The current loop gain may now be expressed by the following equation:
Where
Vosc has a typical value of 2V and ZF(s) is the impedance of the series RF-CF. The current loop gain
is designed to obtain a high DC gain to minimize static error and cross the 0dB axes with a constant -20dB/dec
slope with a crossover frequency
ωTI. Neglecting the effect of ZF(s), the transfer function has one zero and two
poles. Both the poles are fixed once the output filter is designed and also the zero (
ωOUT=1/ROUTCOUT) is fixed
by the maximum current deliverable by the converter. To obtain the desired shape an RF-CF series network is
considered for the ZF(s) implementation. A zero at ωF=1/RFCF is then introduced together with an integrator.
This integrator minimizes the static error while placing the zero in correspondence with the L-C resonance a
simple -20dB/dec shape of the gain is assured (See Figure 12).
Rout
Cout
ESR
L
RFB
RF
CF
REF
PWM
IFB
Av
-ZF/RFB
Ac
Rs/Rg
-ZF
1/
Vosc
VCOMP
VOUT
d
VIN
VCOMP
VOUT
d
IFB
IOUT
ZF
GLOOPI
Av s
()
V
OU T
d
---------------
....
{}
V
IN
1s
+
ESR C
OUT
S
2
C
OUT
L
2
---
sESR C
OUT
L
2R
OUT
-----------------------
+
1
+
+
-----------------------------------------------------------------------------------------------------------------------------
==
=
Ac s
()
I
OUT
d
------------
....
{}
V
IN
R
OU T
---------------
1s
+
ESR C
OUT
S
2
C
OUT
L
2
---
sESR C
OUT
L
2R
OUT
-----------------------
+
1
+
+
-----------------------------------------------------------------------------------------------------------------------------
===
G
LOOPI s
()
Ac s
() Rs Z
F s
()
Rg
Vosc
-----------------------------------------------
V
IN
R
OUT
---------------
1s
+
ESR C
OUT
S
2
C
OUT
L
2
---
s
ESR C
OUT
L
2R
OUT
-----------------------
+
1
+
+
------------------------------------------------------------------------------------------------------------------------------
Rs
Rg
--------
Z
F s
()
Vosc
------------------
==
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