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参数资料
| 型号： | LB11696V |
| 厂商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 0.03 A, PDSO30 |
| 封装： | 0.275 INCH, SSOP-30 |
| 文件页数： | 9/16页 |
| 文件大小： | 394K |
| 代理商： | LB11696V |
No.8087-2/16
LB11696V
Allowable Operating Ranges at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage range 1-1
VCC1-1
VCC pin
8 to 17
V
Supply voltage range 1-2
VCC1-2
VCC pin, when VCC is shorted to VREG.
4.5 to 5.5
V
Output current
IO
UL, VL, WL, UH, VH, and WH pins
25
mA
5 V constant voltage output current
IREG
–30
mA
HP pin applied voltage
VHP
0 to 17
V
HP pin output current
IHP
0 to 15
mA
RD pin applied voltage
VRD
0 to 17
V
RD pin output current
IRD
0 to 15
mA
Electrical Characteristics at Ta = 25°C, VCC = 12 V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Current drain 1
ICC1
12
16
mA
Current drain 2
ICC2
Stop mode
2.5
4
mA
[5 V Constant Voltage Output (VREG pin)]
Output voltage
VREG
4.7
5.0
5.3
V
Line regulation
VREG1
VCC = 8 to 17 V
40
100
mV
Load regulation
VREG2
IO = –5 to –20 mA
10
30
mV
Temperature coefficient
VREG3
Design target value
0
mV/°C
[Output Block]
Output voltage 1-1
VOUT1-1
Low level, IO = 400 A
0.2
0.5
V
Output voltage 1-2
VOUT1-2
Low level, IO = 10 mA
0.9
1.2
V
Output voltage 2
VOUT2
High level, IO = –20 mA
VCC – 1.1 VCC – 0.9
V
Output leakage current
IOleak
10
A
[Hall Amplifier Block]
Input bias current
IHB (HA)
–2
–0.5
A
Common-mode input voltage range 1
VICM1
When a Hall effect device is used
0.5
VCC – 2.0
V
Common-mode input voltage range 2
VICM2
Single-sided input bias mode (when a Hall IC
0
VCC
V
is used)
Hall Input Sensitivity
80
mVp-p
Hysteresis
VIN (HA)
15
24
40
mV
Input voltage low
→ high
VSLH (HA)
5
12
20
mV
Input voltage high
→ low
VSHL (HA)
–20
–12
–5
mV
[CTL Amplifier]
Input offset voltage
VIO (CTL)
–10
10
mV
Input bias current
IB (CTL)
–1
1
A
Common-mode input voltage range
VICM
0
VREG – 1.7
V
High-level output voltage
VOH (CTL)
ITOC = –0.2 mA
VREG – 1.2 VREG – 0.8
V
Low-level output voltage
VOL (CTL)
ITOC = 0.2 mA
0.8
1.05
V
Open-loop gain
G (CTL)
f (CTL) = 1 kHz
45
51
dB
[PWM Oscillator (PWM pin)]
High-level output voltage
VOH (PWM)
2.75
3.0
3.25
V
Low-level output voltage
VOL (PWM)
1.2
1.35
1.5
V
External capacitor charge current
ICHG
VPWM = 2.1 V
–120
–90
–65
A
Oscillator frequency
f (PWM)
C = 2000 pF
22
kHz
Amplitude
V (PWM)
1.4
1.6
1.9
Vp-p
[TOC pin]
Input voltage 1
VTOC1
Output duty: 100%
2.68
3.0
3.34
V
Input voltage 2
VTOC2
Output duty: 0%
1.2
1.35
1.5
V
Input voltage 1 low
VTOC1L
Design target value, when VREG = 4.7 V, 100%
2.68
2.82
2.96
V
Input voltage 2 low
VTOC2L
Design target value, when VREG = 4.7 V, 0%
1.23
1.29
1.34
V
Input voltage 1 high
VTOC1H
Design target value, when VREG = 5.3 V, 100%
3.02
3.18
3.34
V
Input voltage 2 high
VTOC2H
Design target value, when VREG = 5.3 V, 0%
1.37
1.44
1.50
V
[HP Pin]
Output saturation voltage
VHPL
IO = 10 mA
0.2
0.5
V
Output leakage current
IHPleak
VO = 18 V
10
A
Continued on next page.
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相关代理商/技术参数 |
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