
No.8412-3/14
LB11697V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
TOC pin
Input voltage 1
VTOC1
Output duty: 100%
2.68
3.0
3.34
V
Input voltage 2
VTOC2
Output duty: 0%
1.2
1.35
1.5
V
Input voltage 1 low
VTOC1L
Design target value*, when VREG = 4.7 V, 100%
2.68
2.82
2.96
V
Input voltage 2 low
VTOC2L
Design target value*, when VREG = 4.7 V, 0%
1.23
1.29
1.34
V
Input voltage 1 high
VTOC1H
Design target value*, when VREG = 5.3 V, 100%
3.02
3.18
3.34
V
Input voltage 2 high
VTOC2H
Design target value*, when VREG = 5.3 V, 0%
1.37
1.44
1.50
HP Pin
Output saturation voltage
VHPL
IO = 10 mA
0.2
0.5
V
Output leakage current
IHPleak
VO = 18 V
10
A
CSD Oscillator (CSD pin)
High-level output voltage
VOH (CSD)
2.7
3.0
3.3
V
Low-level output voltage
VOL (CSD)
0.7
1.0
1.3
V
External capacitor charge current
ICHG1
VCSD = 2 V
–3.15
–2.5
–1.85
A
External capacitor discharge current
ICHG2
VCSD = 2 V
0.1
0.14
0.18
A
Charge/discharge current ratio
RCSD
(Charge current)/(discharge current)
15
18
21
times
RD Pin
Low-level output voltage
VRDL
IO = 10 mA
0.2
0.5
V
Output leakage current
IL (RD)
VO = 18 V
10
A
Current Limiter Circuit (RF pin)
Limiter voltage
VRF
RF-RFGND
0.225
0.25
0.275
V
Undervoltage Protection Circuit (LVS pin)
Operating voltage
VSDL
3.5
3.7
3.9
V
Release voltage
VSDH
3.95
4.15
4.35
V
Hysteresis
VSD
0.3
0.45
0.6
V
PWMIN Pin
Input frequency
f (PI)
50
kHz
High-level input voltage
VIH (PI)
2.0
VREG
V
Low-level input voltage
VIL (PI)
0
1.0
V
Input open voltage
VIO (PI)
VREG – 0.5
VREG
V
Hysteresis
VIS (PI)
0.2
0.25
0.4
V
High-level input current
IIH (PI)
VPWMIN = VREG
–10
0
+10
A
Low-level input current
IIL (PI)
VPWMIN = 0 V
–130
–90
A
S/S Pin
High-level input voltage
VIH (SS)
2.0
VREG
V
Low-level input voltage
VIL (SS)
0
1.0
V
Hysteresis
VIS (SS)
0.2
0.25
0.4
V
High-level input current
IIH (SS)
VS/S = VREG
–10
0
+10
A
Low-level input current
IIL (SS)
VS/S = 0 V
–10
–1
A
F/R Pin
High-level input voltage
VIH (FR)
2.0
VREG
V
Low-level input voltage
VIL (FR)
0
1.0
V
Input open voltage
VIO (FR)
VREG – 0.5
VREG
V
Hysteresis
VIS (FR)
0.2
0.25
0.4
V
High-level input current
IIH (FR)
VF/R = VREG
–10
0
+10
A
Low-level input current
IIL (FR)
VF/R = 0 V
–130
–90
A
N1 Pin
High-level input voltage
VIH (N1)
2.0
VREG
V
Low-level input voltage
VIL (N1)
0
1.0
V
Input open voltage
VIO (N1)
VREG – 0.5
VREG
V
High-level input current
IIH (N1)
VN1 = VREG
–10
0
+10
A
Low-level input current
IIL (N1)
VN1 = 0 V
–130
–100
A
N2 Pin
High-level input voltage
VIH (N2)
2.0
VREG
V
Low-level input voltage
VIL (N2)
0
1.0
V
Input open voltage
VIO (N2)
VREG – 0.5
VREG
V
High-level input current
IIH (N2)
VN2 = VREG
–10
0
+10
A
Low-level input current
IIL (N2)
VN2 = 0 V
–130
–100
A
Continued from preceding page.