
LB11823M
No.7106-3/18
Continued from preceding page.
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
VCTL pin
Input voltage 1
VCTL1
Output duty 0%
1.05
1.4
1.75
V
Input voltage 2
VCTL2
Output duty 100%
3.0
3.5
4.1
V
Input bias current 1
IB1 (CTL)
VCTL = 0V
-80
-60
μA
Input bias current 2
IB2 (CTL)
VCTL = 5V
60
80
μA
PWM oscillator (PWM pin)
Output H level voltage
VOH (PWM)
2.75
3.0
3.25
V
Output L level voltage
VOL (PWM)
1.0
1.2
1.3
V
External C charge current
ICHG
VPWM = 2.1V
-60
-45
-30
μA
Oscillator frequency
f (PWM)
C = 1000pF
17.6
22
26.8
kHz
Amplitude
V (PWM)
1.6
1.8
2.1
Vp-p
TOC pin
Input voltage 1
VTOC1
Output duty 0%
2.72
3.0
3.30
V
Input voltage 2
VTOC2
Output duty 100%
0.99
1.2
1.34
V
Input voltage 1L
VTOC1L
Design target value*, 0% with VCC2 = 4.7V
2.72
2.80
2.90
V
Input voltage 2L
VTOC2L
Design target value*, 100% with VCC2 = 4.7V
0.99
1.08
1.17
V
Input voltage 1H
VTOC1H
Design target value*, 0% with VCC2 = 5.3V
3.08
3.20
3.30
V
Input voltage 2H
VTOC2H
Design target value*, 100% with VCC2 = 5.3V
1.11
1.22
1.34
V
HP pin
Output saturation voltage
VHPL
IO = 7mA
0.15
0.5
V
Output leakage current
IHP leak
VO = 13.5V
10
μA
FGS pin
Output saturation voltage
VFGS
IO = 5mA
0.15
0.5
V
Output leakage current
IFGS leak
VO = 13.5V
10
μA
FG amplifier
Input offset voltage
VIO (FG)
-10
10
mV
Input bias current
IB (FG)
-1
1
μA
Output H level voltage
VOH (FG)
IFG0 = -0.2mA
VREG-1.2
VREG-0.8
V
Output L level voltage
VOL (FG)
IFG0 = 0.2mA
0.8
1.2
V
FG input sensitivity
Gain 100-fold
3
mV
Common phase input voltage range
VICM
1.2
VREG-2.0
V
Next-stage Schmidt width
40
80
140
mV
Operation frequency range
10
kHz
Open loop GAIN
f (FG) = 2kHz
45
49
dB
CSD oscillator (CSD pin)
Output H level voltage
VOH (CSD)
3.2
3.6
4.0
V
Output L level voltage
VOL (CSD)
0.9
1.1
1.3
V
External C charge current
ICHG1
-14
-10
-6
μA
External C discharge current
ICHG2
7
11
15
μA
Oscillator frequency
f (CSD)
C = 0.01
μF
200
Hz
Amplitude
V (CSD)
2.2
2.5
2.75
Vp-p
Current limiter circuit (RF pin)
Limiter voltage
VRF
0.45
0.5
0.55
V
Low-voltage protection circuit (LVS pin)
Operating voltage
VSDL
3.6
3.8
4.0
V
Release voltage
VSDH
4.1
4.3
4.5
V
Hysteresis width
ΔVSD
0.35
0.5
0.65
V
Note : * These items are design target values and are not tested.
Continued on next page.