参数资料
型号: LB11873
元件分类: 运动控制电子
英文描述: BRUSHLESS DC MOTOR CONTROLLER, 1.8 A, PDSO36
封装: 0.375 INCH, HSOP-36
文件页数: 4/14页
文件大小: 155K
代理商: LB11873
LB11873
No.A0081-12/14
4. Power saving circuit
This IC goes into a power saving state in which current drain is reduced when set to the stop state. This power saving
state is implemented by cutting the bias current to most of the circuits in the IC. The 5V regulator output, however, is
still output when the IC is in the power saving state.
5. Reference clock
Care must be taken to assure that no noise due to chattering or other problems appears on the externally input clock
signal. While the input circuit is designed with hysteresis, noise must be rejected by, for example, inserting capacitors
in the clock line if noise problems occur.
The LB11873 provides a built-in clock disconnection protection circuit. At clock frequencies lower than the frequency
determined by the following equation, the LB11873 will not perform its normal control operation, but rather will
operate in an intermittent mode.
f (Hz)
≈ 1.02 ÷ CCSD
CCSD (F) : the capacitor connected between the CSD pin and ground.
If a 0.033F capacitor is used, the frequency will be about 31Hz.
If the IC is set to the start state with absolutely no clock signal provided, the motor will first start to turn somewhat and
then the drive will be turned off.
If motor rotation stops, a time in excess of the constraint protection operating time elapses, and then the clock signal is
applied again, drive operation will not be restarted. However, if the clock signal is reapplied before the constraint
protection circuit operates, drive operation will restart.
6. PWM frequency
The PWM frequency is determined by the capacitance of the capacitor (C) connected to the PWM pin.
fPWM ≈ 1/(43000 × C)
If a 680pF capacitor is used, the circuit will oscillate at about 34kHz. If the PWM frequency is too low the motor will
emit switching noise, and if it is too high the power loss in the output will increase. A frequency in the range 15kHz to
50kHz is desirable. This capacitor must be connected between this pin and the GND pin by lines that are as short as
possible to make this circuit immune to noise.
The capacitor ground side must be connected as close as possible to the IC control block ground (the GND1 pin), to
minimize the influence of the output.
7. Hall sensor input signals
The Hall sensor input signals must have an amplitude (differential) of over 50mVpp. If disruption of the output
waveforms occurs due to noise on these signals, capacitors must be connected between the Hall sensor inputs (between
the + and - sides).
8. FCS pin
The capacitor (about 0.1F) connected to the FC pin is required for correction of the control loop frequency
characteristics.
9. Constraint protection circuit
The LB11873 includes a built-in constraint protection circuit to protect the IC and the motor if the motor is physically
constrained from turning.
If FG signal (one side edge of IN1) does not switch states for a period in excess of a certain fixed time in the start state,
the PWM drive side output is turned off.
The time is set by the capacitor connected to the CSD pin.
Set time (seconds)
≈ 30.5 × 0.98 × CCSD (μF)
If a 0.033F capacitor is used, the protection operation time will be about 0.99 seconds.
The constraint protection state can be cleared by either switching to the stop state (and remaining for over 100
μs) or
turning the power off and then on again. Note that the constraint protection circuit may not operate correctly if there is
noise on the FG signal when the motor is physically constrained.
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