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参数资料
| 型号： | LB11884 |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1.2 A, PDSO48 |
| 封装： | 0.375 INCH, HSSOP-48 |
| 文件页数： | 12/18页 |
| 文件大小： | 325K |
| 代理商： | LB11884 |
LB11884
No.7883-3/18
Continued from preceding page.
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
C_CNT input voltage
VCCNT
0
VCC
V
C_CNT input current
ICCNT
C_CNT = 3V, sink current
0.5
2.0
A
C_CNT offset voltage
OCCTL
VC_RFP
≥10mV
2.440
2.515
2.590
V
C_CNT gain
GCCNT
C_ILM = 5V
Calculation of “OCCNT+0.2V” and
”OCCNT+0.4V”.
0.49
0.53
0.57
V/V
C_CNT pin short brake release voltage
BROFF2
1.1
1.4
V
Pin current at C_CNT pin short brake
released
IBROFF2
Source current, C_CNT = 0V
0.1
0.3
A
F/R forward voltage
VFW
1.5
VCC
V
F/R reverse voltage
VRW
0
1
V
F/R input current
IFR
C_FR = 3V, sink current
100
200
A
FG amplifier reference voltage
VFGR
2.40
2.50
2.60
V
GDC
29.5
31.1
32.7
fold
Linear amplifier gain DC 36kHz
G36
20.0
25.0
30.0
fold
Hysteresis amplifier output low level
voltage
VHO
IHO = 4mA
0.2
0.4
V
Hysteresis of hysteresis amplifier
VHS
Both hysteresis
60
72
80
mV
Hysteresis amplifier output duty ratio
FGDT
360Hz Fgin = 40mVp-p
49
50
51
%
PWM carrier frequency
FOSC
CPWM = 680pF
18.5
21.7
25.0
kHz
Internal current limiter setup voltage
CILM
C_RF = 100
0.70
0.75
0.80
V
Drum Motor Unit at Ta = 25
°C, VREG = 5V, DL_VCC = 12V
Output saturation voltage
DVSAT
IO = 0.6A, Source+Sink
1.8
2.6
V
D_CNT input voltage
VDCNT
0
VCC
V
D_CNT input current
IDCNT
D_CNT = 3V, sink current
0.5
A
D_CNT offset voltage
ODCNT
VD_RF
≥10mV
2.40
2.50
2.60
V
D_CNT gain
GDCTL
D_RF = 0.5
,
Calculation of ODCTL+0.2V and ODCTL
+0.4V
0.40
0.50
0.60
V/V
PCOUT output current 1
IPCOU
Source current *Design target
20
45
A
PCOUT output current 2
IPCOD
Sink current *Design target
20
45
A
D_VCOIN input current
IVCOIN
D_VCOIN = 3V, sink current
1
A
Minimum VCO frequency
FVCO min
D_CX = 0.022
F, D_VCOIN = Open
330
410
500
Hz
Maximum VCO frequency
FVCO max
D_CX = 0.022
F, D_VCOIN = 5V
15.0
18.0
21.0
kHz
D_C1, D_C2 source current ratio
RSOURCE
1-(IC1SOURCE/IC2SOURCE)
-12
0
12
%
D_C1, D_C2 sink current ratio
RSINK
1-(IC1SINK/IC2SINK)
-12
0
12
%
D_C1 source/sink current ratio
RC1
IC1SOURCE/IC1SINK
40
50
60
%
D_C2 source/sink current ratio
RC2
IC2SOURCE/IC2SINK
40
50
60
%
D_FG output high level voltage
VFH
4.7
V
D_FG output low level voltage
VFL
-0.5mA load
0.4
V
D_PG amplifier reference voltage
VPGR
2.8
3.0
3.2
V
D_PG amplifier input offset
OPG
-4
+4
mV
D_PG amplifier input bias
IPG
D_PG- = 2.5V, source current
0.25
A
Linear amplifier gain
G1
Freq = 1kHz
50
dB
Hysteresis amplifier threshold level 1
VHYS1
70
100
130
mV
Hysteresis amplifier threshold level 2
VHYS2
140
200
260
mV
D_PG output high level voltage
VPH
0.5mA load
4.7
V
D_PG output low lLevel voltage
VPL
0.2
V
FG/PG mix MID voltage
Vmid
D_PGO2 D_FGO short circuit
2.4
2.5
2.6
V
Internal current limiter setup voltage
DILM
D_RF = 100
0.38
0.41
0.44
V
* It is a design target value and measurement is not carried out.
Continued on next page.
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