参数资料
型号: LB11920
元件分类: 运动控制电子
英文描述: BRUSHLESS DC MOTOR CONTROLLER, 3.5 A, DFM28
封装: 0.500 INCH, DIP-28
文件页数: 9/10页
文件大小: 116K
代理商: LB11920
LB11920
No.7229-8/10
Continued from preceding page.
Pin No.
Pin name
Function
Equivalent circuit
18
17
20
19
22
21
IN1+
IN1-
IN2+
IN2-
IN3+
IN3-
Hall amplifier input.
IN+ > IN- is the input high state, and the reverse is
the input low state.
Connect a capacitor between the IN+ and IN-
inputs if there is noise in the Hall sensor signals.
VCC
300
Ω
300
Ω
19 21 23
18 20 22
23
GND3
SUBGND pin to connect to GND1 that is GND of
the control circuit.
4
27
NC
NC pin that can be used for wiring.
LB11920 Description
1. Output drive circuit
This IC is of a direct PWM drive type that suffers less power loss at the output.
On the basis of the signal (“H” level for OFF and “L” level for ON) entered in the PWMIN pin, the lower output Tr
performs PWM switching, causing change in the motor drive power.
To control by means of the DC voltage, apply the voltage to the TOC pin (in this case, the PWMIN pin should be in the
“L” level input condition). The TOC pin voltage is compared with the oscillation voltage of PWM pin, determining the
duty. As the TOC pin voltage is lower, the output duty increases.
2. Hall input signal
For Hall input, entry of the signal whose amplitude is larger than the hysteresis width (50mV max) is necessary.
Considering effects of noise and phase delay, entry of the amplitude of 120mVp-p (at differential input) or more is
recommended.
When noise causes disturbance in the output waveform (at phase switching) or in the HP output (Hall signal
three-phase composite output), insert a capacitor, etc. as near as possible to the pin between inputs to prevent such
effects.
The Hall input is used as a signal for judgment of the input of the motor lock protection circuit. Though it is designed to
ignore noise to a certain extent, due attention should be paid to check for incorrect operation of the protection circuit.
Both upper and lower outputs are OFF when all three-phases of Hall input signal are in the common-mode input
condition.
When the Hall IC output is to be entered, entry of 0 - VCC can be made for another single-side input by fixing either
one side (+ or -) of input to the voltage within the common-mode input range with the Hall element used.
3. Current limiting circuit
The current limiting circuit performs limiting with the current determined from I = VRF/Rf (VRF = 0.5Vtyp, Rf :
current detector resistance) (that is, this circuit limits the peak current).
The control operation functions to reduce the on state duty of the output and thus reduce the current.
Switching during current limiting is made on the basis of the frequency oscillated with the PWM pin.
The PWM frequency is determined from the capacitance C (F) of capacitor connected to the PWM pin.
fPWM ≈ 1/ (50000 × C)
The PWM frequency of 15k to 25kHz is recommended. As PWM oscillation is used also as a clock signal of the
internal logic circuit, its oscillation is necessary even in the application where current limiting is not needed.
4. Power save circuit
This IC enters the power save condition to decrease the current dissipation in the stop mode. In this condition, the bias
current of most of circuits is cut off.
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