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参数资料
| 型号： | LB11985H |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1.5 A, PDSO28 |
| 封装： | HSOP-28 |
| 文件页数： | 2/9页 |
| 文件大小： | 157K |
| 代理商： | LB11985H |
No. 6209-2/9
LB11985H
Electrical Characteristics at Ta = 25°C, VCC = 5 V, VS = 15 V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
VCC current drain
ICC
RL = ∞, VCTL = 0 V (quiescent mode)
10
15
mA
[Output]
Output saturation voltage
VOsat1
IO = 500 mA, Rf = 0.5 , Sink + Source
2.2
2.7
V
VCTL = VLIM = 5 V (with saturation prevention)
VOsat2
IO = 1.0 A, Rf = 0.5 , Sink + Source
2.8
3.7
V
VCTL = VLIM = 5 V (with saturation prevention)
Output leakage current
IOleak
1.0
mA
[FR]
FR pin input
VFR
14
V
Threshold voltage
FR pin input
Ib (FR)
VFR = 5 V
100
150
A
Input bias current
[BR]
BR pin input
VBRTH
14
V
Threshold voltage
BR pin input
Ib (BR)
VBR = 5 V
100
150
A
Input bias current
[Control]
CTLREF pin voltage
VCREF
2.0
2.15
2.3
V
CTLREF pin input range
VCREF IN
1
4
V
CTL pin input bias current
Ib (CTL)
VCTL = 5 V, with CTLREF open
5
A
CTL pin control start voltage
VCTL (ST)
Rf = 0.5 , VLIM = 5 V, Io ≥ 40 mA
2.0
2.2
2.4
V
With the Hall input logic states fixed (U, V, W = high, high, low)
CTL pin control Gm
Gm (CTL)
Rf = 0.5 , Io = 200 mA
1.8
2.25
2.7
V
With the Hall input logic states fixed (U, V, W = high, high, low)
[Current Limiter]
LIM current limit offset voltage
Voff (LIM)
Rf = 0.5 , VCTL = 5 V, Io ≥ 40 mA
80
200
320
mV
With the Hall input logic states fixed (U, V, W = high, high, low)
LIM pin input bias current
Ib (LIM)
VCTL = 5 V,VREF: OPEN, VLIM = 0 V
–2
–1
A
LIM pin current limit level
Gm (LIM)
Rf = 0.5 , VCTL = 5 V
0.37
0.47
0.57
mA
With the Hall input logic states fixed (U, V, W = high, high, low)
[Hall Amplifier]
Input offset voltage
Voff (HALL)
–6
+6
mV
Input bias current
Ib (HALL)
1.0
3.0
A
Common-mode input voltage
Vcm (HALL)
1.3
3.3
V
Torque ripple correction ratio
TRC
At the bottom and peak that occur in the Rf
14.5
%
waveform at 200 mA (Rf = 0.5 )
[FG Amplifier]
FG amplifier input offset voltage
Voff (FG)
–8
+8
mV
FG amplifier input bias current
Ib (FG)
–100
nA
FG amplifier output saturation voltage
VOsat (FG)
For the sink side, at the internal pull-up resistor
0.4
0.55
V
FG amplifier common-mode input voltage
VCM (FG)
1.0
4.0
V
[Saturation]
Saturation prevention circuit
VOsat (DET) Io = 10 mA, Rf = 0.5 , VCTL = VLIM = 5 V
0.13
0.25
0.42
V
lower side set voltage
The voltages between the OUT-Rf pairs at full wave.
[Schmitt Amplifier]
Duty
DUTY
60 mVp-p, 1 kHz input *1
49
50
51
%
Upper side output saturation voltage
Vsatu (SH)
4.8
V
Lower side output saturation voltage
Vsatd (SH)
0.2
V
Hysteresis
Vhys
Design target values *2
45
mV
TSD operating temperature
T-TSD
Design target values *2
180
°C
TSD hysteresis
T-TSD
Design target values *2
15
°C
Note *1 : The ratings are just the measured value with no margin afforded.
*2 : Items shown to be design target values in the conditions column are not measured.
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