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参数资料
| 型号： | LB1876 |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 2.5 A, PDSO36 |
| 封装： | 0.375 INCH, HSOP-36 |
| 文件页数： | 6/12页 |
| 文件大小： | 163K |
| 代理商： | LB1876 |
LB1876
No.6201-3/12
Continued from preceding page.
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Phase Comparator Output
Output High level voltage
VPDH
IOH = -100A
VREG-0.2
VREG-0.1
V
Output Low level voltage
VPDL
IOH = 100A
0.2
0.3
V
Output source current
IPD+
VPD = VREG/2
-0.5
mA
Output sink current
IPD
VPD = VREG/2
1.5
mA
Phase Lock Detector Output
Output saturation voltage
VOL(LD)
ILD = 10mA
0.15
0.5
V
Output leak current
IL(LD)
VO = VCC
10
A
Error Amplifier
Input offset voltage
VIO(ER)
Design target value*
-10
+10
mV
Input bias current
IB(ER)
-1
+1
A
Output High level voltage
VOH(ER)
IOH = -500A
VREG-1.2
VREG-0.9
V
Output Low level voltage
VOL(ER)
IOL = 500A
0.9
1.2
V
DC bias level
VB(ER)
-5%
VREG/2
+5%
V
Current Limiter
GDF1
In phase lock mode
0.4
0.5
0.6
times
Drive gain
GDF2
In unlock mode
0.8
1.0
1.2
times
Limiter voltage
VRF
VCC - VM
0.45
0.5
0.55
V
Thermal Shutdown Operation
Operating temperature
TSD
Design target value* (junction temperature)
150
180
°C
Hysteresis width
TSD
Design target value* (junction temperature)
40
°C
Low Voltage Protection
Operating voltage
VSD
8.1
8.5
8.9
V
Hysteresis
VSD
0.2
0.35
0.5
V
CLD Circuit
External capacitor charge current
ICLD
-6
-4.3
-3
V
Operating voltage
VH(CLD
3.25
3.5
3.75
V
CLK Pin
External input frequency
fI(CKIN)
0.1
10
kHz
High level input voltage
VIH(CKIN)
3.5
VREG
V
Low level input voltage
VIL(CKIN)
0
1.5
V
Input open voltage
VIO(CKIN)
VREG-0.5
VREG
V
Hysteresis width
VIS(CKIN)
0.35
0.5
0.65
V
High level input current
IIH(CKIN)
VCKIN = VREG
-10
0
+10
A
Low level input current
IIL(CKIN)
VCKIN = 0V
-280
-210
A
S/S Pin
High level input voltage
VIH(SS)
3.5
VREG
V
Low level input voltage
VIL(SS)
0
1.5
V
Input open voltage
VIO(SS)
VREG-0.5
VREG
V
Hysteresis width
VIS(SS)
0.35
0.5
0.65
V
High level input current
IIH(SS)
VS/S = VREG
-10
0
+10
A
Low level input current
IIL(SS)
VS/S = 0V
-280
-210
A
LDSEL Pin
High level input voltage
VIH(LDSEL)
3.5
VREG
V
Low level input voltage
VIL(LDSEL)
0
1.5
V
Input open voltage
VIO(LDSEL)
VREG-0.5
VREG
V
High level input current
IIH(LDSEL)
VLDSEL = VREG
-10
0
+10
A
Low level input current
IIL(LDSEL)
VLDSEL = 0V
-280
-210
A
BRSEL Pin
High level input voltage
VIH(BRSEL)
3.5
VREG
V
Low level input voltage
VIL(BRSEL)
0
1.5
V
Input open voltage
VIO(BRSEL)
VREG-0.5
VREG
V
High level input current
IIH(BRSEL)
VBRSEL = VREG
-10
0
+10
A
Low level input current
IIL(BRSEL)
VBRSEL = 0V
-280
-210
A
*Design target value, Do not measurement.
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