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参数资料
| 型号： | LB1886V |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1 A, PDSO24 |
| 封装： | SSOP-24 |
| 文件页数： | 2/7页 |
| 文件大小： | 191K |
| 代理商： | LB1886V |
Allowable Operating Ranges at Ta = 25°C
Electrical Characteristics at Ta = 25°C, VCC1 = 5 V, VCC2 = 7 V, VS = 3 V
Note: 1. The IC goes to the standby state when the standby pin is open.
2. These are design target values and are not measured.
The overlap standard is taken as the test standard without change.
No. 4947-2/7
LB1886V
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage 1
VCC1VCC1 ≤ VCC2
4.0 to 6.0
V
Supply voltage 2
VCC2
4 to 10
V
Supply voltage 3
VS
up to VCC2V
Parameter
Symbol
Conditions
min
typ
max
Unit
Current drain 1
ICC1VBR = 5 V
3.0
5.0
mA
Current drain 2
ICC2VBR = 5 V
6.5
10.0
mA
Current drain 3
IS
VBR = 5 V, RL = ∞
5.0
mA
Quiescent current 1
ICCOQ
VSTBY = 0 V
100
μA
Quiescent current 2
ISOQ
VSTBY = 0 V, RL = ∞
150
μA
Output saturation voltage
VO (sat)
IOUT = 0.6 A, sink + source
1.7
V
Output transistor breakdown
VO (sus)
IOUT = 20 mA, *212
V
voltage
Quiescent voltage
VOQ
VBR = 5 V
1.45
1.55
1.65
V
Hall amplifier input offset voltage
VH offset
*
2–5
+5
mV
Hall amplifier common mode
VHCOM
1.4
2.8
V
input voltage range
Hall I/O voltage gain
GVHO
Rangle = 8.2 kΩ
34.5
37.5
40.5
dB
Brake pin high level voltage
VBRH
2.0
V
Brake pin low level voltage
VBRL
0.8
V
Brake pin input current
IBRIN
120
μA
Brake pin leakage current
IBR leak
–30
μA
FRC pin high level voltage
VFRCH
2.8
μA
FRC pin low level voltage
VFRCL
1.2
μA
FRC pin input current
IFRCIN
100
μA
FRC pin leakage current
IFRC leak
–30
μA
Upper side residual voltage
VXH
IOUT = 100 mA, VCC2 = 6 V, VS = 2 V
0.285
0.455
V
Lower side residual voltage
VXL
IOUT = 100 mA, VCC2 = 6 V, VS = 2 V
0.350
0.440
V
Residual voltage inflection point
VSΔVX
IOUT = 100 mA, VCC2 = 6 V, *2
0.9
V
Overlap
OL
VCC2 = 6 V, VS = 3 V, RL = 100 Ω (Y)
69
79
89
%
Overlap vertical delta
ΔOL
VCC2 = 6 V, VS = 3 V, RL = 100 Ω (Y)
–10
0
+10
%
Standby on voltage
VSTBYL
*
1
–0.2
+0.8
V
Standby off voltage
VSTBYH
25
V
Standby pin bias current
ISTBYIN
100
μA
Thermal protection circuit
TTSD
*
2
150
180
210
°C
operating temperature
Thermal protection circuit
ΔTTSD
*
2
15
°C
hysteresis
[FG Amplifier]
FG amplifier input offset voltage
VFG offset
–8
+8
mV
Open loop voltage gain
GVFG
f = 10 kHz
43
dB
Source output saturation voltage
VFG OU
IO = –2 mA
3.7
V
Sink output saturation voltage
VFG OD
IO = 2 mA
1.3
V
Common mode signal rejection
GHR
*
2
80
dB
ratio
FG amplifier common mode input
VFG CH
0
+3.5
V
voltage range
Phase margin
M
*
2
20
deg
Schmitt amplifier threshold voltage
VFGS SH
VFGin+ = 2.5 V, when VFGout2 goes from high to low
2.45
2.50
2.55
V
Schmitt amplifier hysteresis
VFGS HIS
VFGin+ = 2.5 V
20
40
60
mV
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