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参数资料
| 型号： | LB1951V |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1 A, PDSO24 |
| 封装： | SSOP-24 |
| 文件页数： | 2/9页 |
| 文件大小： | 229K |
| 代理商： | LB1951V |
LB1951V
No. 5232-2/9
Electrical Characteristics at Ta = 25
°C, VCC1 = 3 V, VCC2 = 4.75 V, VS = 1.5 V
Hall amplifier common-mode
input range
Allowable Operating Ranges at Ta = 25
°C
Parameter
Symbol
Conditions
Ratings
Unit
VCC1
2.7 to 6.0
V
Supply voltage
VCC2
3.5 to 9.0
V
Vs
to VCC 2V
Hall input amplitude
VHALL
Between Hall inputs
±20 to ±80
mV0-p
Parameter
Symbol
Conditions
min
typ
max
Unit
[Supply Current]
Supply current 1
ICC1
Iout = 100 mA
3.0
5.0
mA
Supply current 2
ICC2
Iout = 100 mA
7.0
10.0
mA
Static current 1
ICCQ1VSTBY = 0 V
1.5
3.0
mA
Static current 2
ICCQ2VSTBY = 0 V
100
μA
VS static current
ISQ
VSTBY = 0 V
40
100
μA
[VX1]
Upper side residual voltage
VXH1
Iout = 0.2 A
0.15
0.22
0.29
V
Lower side residual voltage
VXL1
Iout = 0.2 A
0.16
0.21
0.26
V
[VX2]
Upper side residual voltage
VXH2
Iout = 0.5 A
0.25
0.40
V
Lower side residual voltage
VXL2
Iout = 0.5 A
0.25
0.40
V
Output side saturation voltage
Vosat
Iout = 0.8 A, Sink + Source
1.40
V
Overlap
O.L
RL =39
Ω× 3, R angle = 20 kΩ
Note 1
70
77
84
%
[Hall Amplifier]
Hall amplifier input offset voltage
VHOFF
Note 2
–5
+5
mV
VHCM
R angle = 20 k
Ω
0.95
2.4
V
Hall amplifier I/O voltage gain
VGVH
R angle = 20 k
Ω
24.5
27.5
30.5
dB
[Standby Pin]
Stand-by pin high-level voltage
VSTH
2.5
V
Standby pin low-level voltage
VSTL
0.4
V
Standby pin input current
ISTIN
VSTBY = 3 V
25
40
μA
Standby leakage current
ISTLK
VSTBY = 0 V
–30
μA
[FRC Pin]
FRC pin high-level voltage
VFRCH
2.5
V
FRC pin low-level voltage
VFRCL
0.4
V
FRC pin input current
IFRCIN
VFRC = 3 V
20
30
μA
FRC pin leakage current
IFRCLK
VFRC = 0 V
–30
μA
[VH]
Hall supply voltage
VHALL
IH = 5 mA, VH (+)–VH (–)
0.85
0.95
1.05
V
VH (–) pin voltage
VH(–)
IH = 5 mA
0.81
0.88
0.95
V
[FG Comparator]
Input offset voltage
VFGOFF
–3
+3
mV
Input bias current
IbFG
VFGIN+ =VFGIN– = 1.5 V
500
nA
Input bias current offset
ΔIbFG
VFGIN+ =VFGIN– = 1.5 V
–100
+100
nA
Common-mode input range
VFGCM
1.2
2.5
V
Output high-level voltage
VFGOH
At internal pull-up
2.8
V
Output low-level voltage
VFGOL
At internal pull-up
0.2
V
Voltage gain
VGFG
(Design target)
Note 2
100
dB
Output current (Sink)
IFGOs
With output pin ‘‘L’’
5
mA
[TSD]
TSD operating temperature
T-TSD
(Design target value)
Note 2
180
°C
TSD temperature hysteresis width
ΔTSD
(Design target value)
Note 2
20
°C
Note 1: Overlapping specifications are assumed to be test specifications.
Note 2: For parameters which have an entry of (Design target value) in the ‘‘Conditions’’ column, no measurements are made.
Ratings
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