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参数资料
| 型号： | LC07410LG |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA40 |
| 封装： | 4.40 X 3.60 MM, FLGA-40 |
| 文件页数： | 26/36页 |
| 文件大小： | 367K |
| 代理商： | LC07410LG |
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LC07410LG
No.A1345-32/36
Control Sequence
Reference voltage, line out start/stop sequence
VREF_BIAS[1]
0.5
×VDDA
LO_PDX
LO_MUTE
t0
t1
t2
t5
t3
t4
0.5
×VDDA
VREF_BIAS[0]
Common refernce voltage
VREF pin
Line output circuit
Line output signal
LOUT1 pin
Recommendation value
t0 > 1ms (Pull down period, at already when LOUT1 pin is GND level.)
t1 > 100ms (Rapid charge period, at VREF pin connected capacity is 4.7
μF)
t2 > 300ms (LOUT1 charge time)
t3 > 1ms (Waiting time of MUTE ON/OFF)
t4 > 0s
t5 > 300ms (Pull down period)
It makes it to LO_VREFSW = 1 usually.
LO_VREFSW function at power down (LO_PDX = 0)
LO_VREFSW = 1: LOUT1 pin becomes VREF level output
LO_VREFSW = 0: LOUT1 pin becomes Hi-Z
Speaker Amplifier Start/Stop Sequence
SP_PDX
0.5
×VDDS
t1
t2
t3
SP_OUT_EN
t2
t3
t4
Speaker amplifier
input signal
SPOUTP/N pin
(Speaker output)
Recommendation value
t1 > 5ms (Speaker bias start-up time)
t2
≠ 10ms (Processing period when POP sound is decreased. Input signal recommends MUTE.)
t3 > 15ms
t4 > 1ms
External capacitance connected to SPKIN pin is 0.1μF
SP_OUT_EN must be set to 0 when power down (SP_PDX = 0) mode.
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