参数资料
型号: LC4128ZC-42MN132C
厂商: Lattice Semiconductor Corporation
文件页数: 42/99页
文件大小: 0K
描述: IC CPLD 128MACROCELLS 132CSBGA
标准包装: 360
系列: ispMACH® 4000Z
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 4.2ns
电压电源 - 内部: 1.7 V ~ 1.9 V
逻辑元件/逻辑块数目: 8
宏单元数: 128
输入/输出数: 96
工作温度: 0°C ~ 90°C
安装类型: 表面贴装
封装/外壳: 132-LFBGA,CSPBGA
供应商设备封装: 132-CSPBGA(8x8)
包装: 托盘
其它名称: 220-1686
LC4128ZC-42MN132C-ND
Lattice Semiconductor
Signal Descriptions
Signal Names
TMS
TCK
TDI
TDO
GOE0/IO, GOE1/IO
GND
NC
V CC
CLK0/I, CLK1/I, CLK2/I, CLK3/I
V CCO0 , V CCO1
ispMACH 4000V/B/C/Z Family Data Sheet
Description
Input – This pin is the IEEE 1149.1 Test Mode Select input, which is used to control
the state machine.
Input – This pin is the IEEE 1149.1 Test Clock input pin, used to clock through the
state machine.
Input – This pin is the IEEE 1149.1 Test Data In pin, used to load data.
Output – This pin is the IEEE 1149.1 Test Data Out pin used to shift data out.
These pins are configured to be either Global Output Enable Input or as general I/O
pins.
Ground
Not Connected
The power supply pins for logic core and JTAG port.
These pins are configured to be either CLK input or as an input.
The power supply pins for each I/O bank.
Input/Output 1 – These are the general purpose I/O used by the logic array. y is GLB
reference (alpha) and z is macrocell reference (numeric). z: 0-15.
ispMACH 4032
ispMACH 4064
y: A-B
y: A-D
yzz
ispMACH 4128
ispMACH 4256
ispMACH 4384
ispMACH 4512
y: A-H
y: A-P
y: A-P, AX-HX
y: A-P, AX-PX
1. In some packages, certain I/Os are only available for use as inputs. See the signal connections table for details.
ispMACH 4000V/B/C ORP Reference Table
4032V/B/C
4064V/B/C
4128V/B/C
4256V/B/C
4384V/B/C
4512V/B/C
Number of I/Os
30
1
32
30
2
32
64
64
92
3
96
64
96
4
128
160
128
192
128
208
Number of GLBs
Number of I/Os /
GLB
2
16
2
16
4
8
4
8
4
16
8
8
8
12
8
12
16
4
16
8
16
8
16
10
16
8
16
8
16
8
16
Mixture
of 8 & 4 5
Reference ORP
16 I/Os /
8 I/Os /
16 I/Os / 8 I/Os / 12 I/Os / 4 I/Os / 8 I/Os / 8 I/Os / 10 I/Os /
8 I/Os /
8 I/Os /
8 I/Os /
GLB
Table
GLB
GLB
GLB
GLB
GLB
GLB
GLB
GLB
GLB
GLB
GLB
4 I/Os /
GLB
1.
2.
3.
4.
5.
32-macrocell device, 44 TQFP: 2 GLBs have 15 out of 16 I/Os bonded out.
64-macrocells device, 44 TQFP: 2 GLBs have 7 out of 8 I/Os bonded out.
128-macrocell device, 128 TQFP: 4 GLBs have 11 out of 12 I/Os
256-macrocell device, 144 TQFP: 16 GLBs have 6 I/Os per
512-macrocell device: 20 GLBs have 8 I/Os per, 12 GLBs have 4 I/Os per
ispMACH 4000Z ORP Reference Table
4032Z
4064Z
4128Z
4256Z
Number of I/Os
Number of GLBs
Number of I/Os / GLB
Reference ORP Table
32
2
16
16 I/Os /
GLB
32
4
8
8 I/Os /
GLB
64
4
16
16 I/Os /
GLB
64
8
8
8 I/Os /
GLB
96
8
12
12 I/Os /
GLB
64
16
4
4 I/Os /
GLB
96 1
16
8
8 I/Os /
GLB
128
16
8
8 I/Os /
GLB
1. 256-macrocell device, 132 csBGA: 16 GLBs have 6 I/Os per
42
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