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| 型号： | LC5128B-5T128I |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 中文描述： | EE PLD, 6.5 ns, PQFP128 |
| 封装： | TQFP-128 |
| 文件页数： | 1/66页 |
| 文件大小： | 240K |
| 代理商： | LC5128B-5T128I |
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www.latticesemi.com
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5kb_11.1
ispMACH 5000B Family
2.5V In-System Programmable
SuperWIDE High Density PLDs
September 2003
Data Sheet
Table 1. ispMACH 5000B Family Selection Guide
ispMACH
5128B
ispMACH
5256B
ispMACH
5384B
ispMACH
5512B
Macrocells
128
256
384
512
User I/O Options
92
92/144
156/186
156/196/256
tPD (ns)
3.0
4.0
4.5
tS – Set-up with 0 Hold (ns)
1.7
2.1
2.5
tCO (ns)
2.2
2.7
2.8
fMAX (MHz)
275
250
200
Supply Voltage (V)
2.5
Package
128-pin TQFP
208-pin PQFP
256-ball fpBGA
208-pin PQFP
256-ball fpBGA
208-pin PQFP
256-ball fpBGA
484-ball fpBGA
TM
Features
■ High Speed Logic Implementation
SuperWIDE 68-input logic block
Up to 35 product terms per output
Single-level Global Routing Pool (GRP)
■ sysIOTM Capability
LVCMOS 1.8, 2.5 and 3.3
LVTTL
SSTL 2 (I and II)
SSTL 3 (I and II)
CTT 3.3, CTT 2.5
HSTL (I and III)
PCI 3.3
GTL+
AGP-1X
LVDS (clock input)
LVPECL (clock input)
Programmable drive strength
■ Ease of Design
Product term sharing
Extensive clocking and OE capability
■ Broad Device Offering
128 to 512 macrocells
92 to 256 I/Os
128 to 484 pins/balls in TQFP, PQFP and fpBGA
packages
Commercial and industrial temperature ranges
■ Easy System Integration
2.5V power supply
Hot socketing
Input pull-up, pull-down or Bus-keeper
(Pin-by-pin selectable)
Open drain capability
Macrocell-based power management
IEEE 1149.1 Boundary Scan testable
IEEE 1532 compliant In-System Programmable
(ISP)
ispMACH 5000B Introduction
The ispMACH 5000B represents the next generation of
Lattice’s SuperWIDE CPLD architecture. Through their
wide 68-input blocks, these devices give signicantly
improved speed performance for typical designs over
architectures with a lower number of inputs.
In addition to the unique benets of the SuperWIDE
architecture, the ispMACH 5000B provides sysIO capa-
bility to provide support for a variety of advanced I/O
standards.
The ispMACH 5000B devices consist of multiple Super-
WIDE 68-input, 32-macrocell Generic Logic Blocks
(GLBs) interconnected by a single-level routing system
referred to as the Global Routing Pool (GRP). Figure 1
shows the ispMACH 5000B block diagram. Together,
the GLBs and the GRP allow designers to create large
designs in a single device without compromising perfor-
mance.
Discontinued
Product
(PCN
#02-06).
Contact
Rochester
Electronics
for
Availability.
www.latticesemi.com/sales/discontinueddevicessales.cfm
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相关代理商/技术参数 |
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| LC5128B-75T128C | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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