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参数资料
| 型号： | LC5768MV-5FN484C |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 5/99页 |
| 文件大小： | 0K |
| 描述： | IC CPLD 512MACROCELLS 484FPBGA |
| 标准包装： | 60 |
| 系列： | ispXPLD® 5000MV |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 5.0ns |
| 电压电源 - 内部： | 3 V ~ 3.6 V |
| 逻辑元件/逻辑块数目： | 24 |
| 宏单元数： | 768 |
| 输入/输出数： | 317 |
| 工作温度： | 0°C ~ 90°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 484-BBGA |
| 供应商设备封装： | 484-FPBGA（23x23） |
| 包装： | 托盘 |
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Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
9
Table 4. MFB Memory Configuration
Input and Output
The data input and control signals to a MFB in memory mode are generated from inputs from the routing. Data sig-
nals are only available in the true non-inverted format. True or complemented versions of the inputs are available
for generating the control signals. Data and flag outputs are fed from the MFB to the GRP and OSA. Unused inputs
and outputs are not accessible in memory mode.
ROM Operation
In each of the memory modes it is possible to specify the power-on state of each bit in the memory array. This
allows the memory to be used as ROM if desired.
Increased Depth And Width
Designs that require a memory depth or width that is greater than that support by a single MFB can be supported
by cascading multiple blocks. For dual port, single port, and pseudo dual port modes additional width is easily pro-
vided by sharing address lines. Additional depth is supported by multiplexing the RAM output. For FIFO and CAM
modes additional width is supported through the cascading of MFBs.
The Lattice design tools automatically combine blocks to support the memory size specified in the user’s design.
Bus Size Matching
All of the memory modes apart from CAM mode support different widths on each of the ports. The RAM bits are
mapped LSB word 0 to MSB word 0, LSB word 1 to MSB word 1 and so on. Although the word size and number of
words for each port varies this mapping scheme applies to each port.
Memory Mode
Max. Configuration
Size
1
Dual-port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 8
512 x 16
Single-port, Pseudo Dual Port, FIFO
16,384 x1
8,192 x 2
4,096 x 4
2,048 x 8
1,024 x 16
512 x 32
CAM
128 x 48
1. Smaller configurations are possible.
SELECT
DEVICES
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相关代理商/技术参数 |
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| LC5768MV-5FN484I | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5768MV-5FN672C | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5768MV-5FN672I | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5768MV-5Q208C | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5768MV-5Q208I | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
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