参数资料
型号: LC72135M
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20
封装: MFP-20
文件页数: 23/24页
文件大小: 300K
代理商: LC72135M
Continued from preceding page.
Symbol
Pin No.
Type
Functions
Circuit configuration
No. 5175-8/24
LC72135M
LCTR/I1
11
10
IF counter
Input port
HCTR is selected when the LCTS bit in the serial data is
set to 0.
Accepts an input in the frequency range 0.4 to 12 MHz.
The input signal is directly transmitted to the IF counter.
The result is output starting the MSB of the IF counter
using the DO pin.
Four measurement periods are supported: 4, 8, 32, and
64 ms.
LCTR is selected when the LCTS bit in the serial data is
set to 1. (Set the L/I1 bit in the serial data to 1 when
using the IF counter.)
The input frequency range is 100 to 500 kHz.
The signal is directly transmitted to the IF counter.
The result, starting with the MSB of the IF counter, is
output serially through the DO pin.
There are four measurement times: 4, 8, 32, and 64 ms.
If the L/I1 bit in the serial data is set to 0, the LCTR/I1 pin
functions as an input port and the state of that input pin is
transmitted to the controller from the DO pin.
When the input state is low, the data will be 0, and when
the state is high, the data will be 1.
HCTR
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