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参数资料
| 型号： | LC72137 |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP22 |
| 封装： | SDIP-22 |
| 文件页数： | 22/22页 |
| 文件大小： | 348K |
| 代理商： | LC72137 |
No. 5743-9/22
LC72137, 72137M
DI Control Data Descriptions
No.
Control block/data
Description
Related data
Programmable divider data Data that sets the programmable divider
P0 to P15
A binary value in which P15 is the MSB. The LSB changes depending on DVS and SNS.
(*: Don’t care.)
Note: P0 to P3 are ignored when P4 is the LSB.
DVS, SNS
Selects the signal input pin (AMIN or FMIN) for the programmable divider, switches the
frequency range. (*: Don’t care.)
Note: See the “Programmable Divider” item for details.
Reference divider data
Reference frequency (fref) selection data
R0 to R3
Note: PLL INHIBIT
The programmable divider and IF counter blocks are stopped, the FMIN, AMIN,
and IFIN pins go to the pulled-down state, and the charge pump output pin goes to
the high-impedance state.
IF counter control data
IF counter measurement start specification
CTE
CTE = 1: Counter start
CTE = 0: Counter reset
GT0, GT1
IF counter measurement time determination
Note: See the “IF Counter Structure” item for details.
I/O port specification data
Data that specifies input or output for the I/O dual-use pins (IO1, IO2)
IOC1, IOC2
Data: 0 = input mode, 1 = output mode
Output port data
BO1 to BO4, IO1, and IO2 output state data
BO1 to BO4, IO1, IO2
Data: 0 = open, 1 = low
“Data = 0: Open” is selected following a power-on reset.
(1)
(2)
(3)
(4)
(5)
IFS
IOC1
IOC2
DVS
SNS
LSB
Divisor setting (N)
Actual divisor
1
*
P0
272 to 65535
Twice the value of the setting
0
1
P0
272 to 65535
The value of the setting
0
P4
4 to 4095
The value of the setting
DVS
SNS
Input pin
Input frequency range
1
*
FMIN
10 to 160 MHz
0
1
AMIN
2 to 40 MHz
0
AMIN
0.5 to 10 MHz
GT1
GT0
Measurement time (ms)
Wait time (ms)
0
4
3 to 4
0
1
8
3 to 4
1
0
16
3 to 4
1
32
3 to 4
R3
R2
R1
R0
Reference frequency (kHz)
00
0
25
00
0
1
25
00
1
0
25
00
1
25
0
1
0
12.5
0
1
0
1
6.25
0
1
0
3.125
0
1
3.125
10
0
5
10
0
1
5
10
1
0
5
10
1
11
0
3
11
0
1
15
1
0
PLL INHIBIT + Xtal OSC STOP
1
PLL INHIBIT
Continued on next page.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC72137_11 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
| LC72137M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
| LC72137MA-AE | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| LC72140 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizers |
| LC72140M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizers |
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