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参数资料
| 型号： | LC72F3781 |
| 厂商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封装： | 14 X 20 MM, QIP-100 |
| 文件页数： | 17/17页 |
| 文件大小： | 127K |
| 代理商： | LC72F3781 |
LC72F3781
No.0459-9/17
Continued from preceding page.
Pin name
Pin No.
I/O
Pin explanation
Equivalent circuit
PE0
PE1/SCK2
PE2/SO2
PE3/SI2
PF0
PF1/SCK1
PF2/SO1
PF3/SI1
PG0
PG1/SCK0
PG2/SO0
PG3/SI0
16
15
14
13
12
11
10
9
8
7
6
5
I/O
General-purpose I/O ports with shared functions as serial I/O ports.
The input formats are Schmitt inputs. The PE1/SCK2 and PE2/SO2
pins can be switched to function as open drain outputs.
The IOS1 instruction is used to switch between the general-purpose
I/O port and serial I/O port functions.
When used as general-purpose I/O ports :
The pins are set to the general-purpose I/O port function using the
IOS1 instruction.
The mode (input or output) is set in 1-bit units using the IOS1
instruction
When used serial I/O ports :
The pins are set to the serial I/O port function using the IOS1
instruction.
[Pin states when set to the serial I/O port function]
PE0, PF0, PG0 … General-purpose I/O
PE1, PF1, PG1 … SCK input or output
PE2, PF2, PG2 … SO output
PE3, PF3, PG3 … SI input
The PE1/SCK2 and PE2/SO2 pins can be switched to function as
open drain outputs with the IOS2 instruction. When using this circuit
type, the external pull-up resistors must be connected to the same
power supply as that used by the IC.
Input is disabled and the pins go to the high-impedance state in
Backup mode.
These ports are set up as general-purpose input ports after a power
on reset.
XIN
XOUT
1
100
I
O
Connections for 4.5MHz/7.2MHz crystal oscillator element
EO1
EO2
98
97
O
Main charge pump outputs.
These pins output a high level when the frequency of the local
oscillator divided by n is higher than that of the reference frequency,
and they output a low level when that frequency is lower.
They go to the high-impedance state when the frequencies match.
These pins go to the high-impedance state in Backup mode, after a
power on reset, and in the PLL stopped state.
VDDPORT
VDDPLL
VSSCPU
VSSPORT
VSSADC
VSSPLL
39
93
4
40
81
96
-
Power supply connections.
The VDDPORT and VSSPORT pins are mainly supply power for the
peripheral I/O blocks.
The VDDPLL and VSSPLL pins are mainly for the PLL circuits and
the regulator.
The VSSCPU pin is mainly used by the CPU block.
The VSSADC pin is mainly used by the ADC block.
Since all the VDD and VSS pins are independent, all must be
connected to the same power supply.
VREG
3
O
Internal low voltage output.
Connect a bypass capacitor to this pin.
Continued on next page.
ILC05533
PE1/PE2-Port
Open drain Control
BACK UP
ILC05532
BACK UP
ILC05534
XIN
XOUT
ILC05535
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