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参数资料
| 型号： | LC74798 |
| 元件分类： | 画面叠加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP30 |
| 封装： | 0.400 INCH, SDIP-30 |
| 文件页数： | 6/32页 |
| 文件大小： | 322K |
| 代理商： | LC74798 |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
No. 5833-14/32
LC74798, 74798M
COMMAND6 (Synchronizing signal detection setup command)
First byte
DA
Register
Contents
Notes
0 to 7
State
Function
7—
1
6—
1
5—
1
4—
0
3
SEL0
0
1
2
MOD0
0
1
1DISLIN
0
12 lines
1
10 lines
0
MUT
0Normal output
1CVIN is cut and CVOUT is held at the pedestal level
Command 6 identification code.
Sets up synchronizing signal control.
Switches the SEPOUT (pin 26) output
Switches the number of lines displayed
CVOUT switching
01
0
DAV
Sliced data width
1
CSYNC
ST.PULSE
SEL0
MOD0
Note: All registers are set to 0 when the LC74798/M is reset by the RST pin.
Second byte
DA
Register
Contents
Notes
0 to 7
State
Function
7—
0Second byte identification bit
6
RN2
0
1
5
RN1
0
1
4
RN0
0
1
3
SN3
0
1
2
SN2
0
1
SN1
0
1
0
SN0
0
1
External synchronizing signal detection control.
Signal present → signal absent transition
detection.
Sets the sampling period in which SYNC cannot be
detected continuously in the horizontal
synchronizing signal period (1H).
External synchronizing signal detection control.
Signal absent → signal present transition
detection.
Sets the sampling period in which SYNC can be
detected continuously in the horizontal
synchronizing signal period (1H).
RN2
RN1
RN0
Number of times HSYNC detected
000
32 times
001
4 times
010
8 times
100
16 times
SN3
SN2
SN1
SN0
Number of times HSYNC detected
000
0Not detected
0001
32 times
0010
64 times
010
0
128 times
100
0
256 times
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相关代理商/技术参数 |
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| LC74798M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:On-Screen Display Controller IC |
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| LC74799M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:On-Screen Display Controller IC |
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