参数资料
型号: LC78011E
元件分类: 颜色信号转换
英文描述: COLOR SIGNAL ENCODER, PQFP48
封装: QIP-48
文件页数: 8/13页
文件大小: 162K
代理商: LC78011E
No. 5755-4/13
LC78011E
Continued from preceding page.
Pin No.
Symbol
I/O
Polarity
Function
40
BLANK
IN
Positive
Composite blanking signal input (HBLANK + VBLANK)
41
CSYNC
IN
Negative Composite synchronizing signal input (HSYNC + VSYNC)
42
HSYNC
IN
Negative Horizontal synchronizing signal input (HSYNC)
43
YUVSEL1
IN
Positive
Signal input setup
44
YUVSEL2
IN
Positive
45
RYIN7
IN
Positive
R/Y data input (MSB)
A pull-down resistor is built in.
46
RYIN6
IN
Positive
R/Y data input
A pull-down resistor is built in.
47
RYIN5
IN
Positive
R/Y data input
A pull-down resistor is built in.
48
RYIN4
IN
Positive
R/Y data input
A pull-down resistor is built in.
YUVSEL1 YUVSEL2
Video signal input signal mode
0
RYIN = R in, GUIN = G in, BVIN = B in
1
0
RYIN = Y in, GUIN = U in, BVIN = V in
0
1
RYIN = Y in, GUIN = none, BVIN = UV in
1
— (Illegal setting)
Notes:1. The voltage applied as the digital system power supply voltage must not exceed the voltage applied as the analog system power supply voltage.
2. Unused input pins must be tied high or low. If the OSD inputs are not used, tie OSBLK (pin 39) low.
3. Note that the clock input frequencies (CLKI: pin 6, and FSCIN: pin 7) depend on the TV subcarrier pull-in range. The CLKI input clock and the
FSCIN clock must be synchronized.
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VDD1 max
DVDD (DVDD ≤ AVDD)
DVSS – 0.3 to DVSS +7.0
V
VDD2 max
AVDD
AVSS – 0.3 to AVSS +7.0
V
RYIN0 to RYIN7, GUIN0 to GUIN7,
BVIN0 to BVIN7, CLKI, FSCIN,
Input voltage
VIN
OSRIN, OSGIN, OSBIN, OSBLK,
DVSS – 0.3 to DVDD +0.3
V
BLANK, CSYNC, HSYNC, RESET,
CCSEL, NPSEL, PMSEL, CDGSEL,
YUVSEL1, YUVSEL2, and TEST
Output voltage
VOUT
CROUT, YOUT, and BIAS
DVSS – 0.3 to DVDD +0.3
V
Allowable power dissipation
Pd max
Ta = 25°C
500
mW
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–40 to +125
°C
Specifications
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Supply voltage
VDD1
DVDD (DVDD ≤ AVDD)
3.0
5.5
V
VDD2
AVDD
4.5
5.0
5.5
V
OSRIN, OSGIN, OSBIN, OSBLK
VIH1
CCSEL, NPSEL, PMSEL, CDGSEL,
0.7 VDD1
VDD1 + 0.3
V
Input high-level voltage
YUVSEL1, YUVSEL2, TEST
RYIN0 to RYIN7, GUIN0 to GUIN7,
VIH2
BVIN0 to BVIN7, BLANK, CSYNC
2.2
VDD1 + 0.3
V
HSYNC, RESET
OSRIN, OSGIN, OSBIN, OSBLK
VIL1
CCSEL, NPSEL, PMSEL, CDGSEL,
VSS1 – 0.3
0.3 VDD1
V
Input low-level voltage
YUVSEL1, YUVSEL2, TEST
RYIN0 to RYIN7, GUIN0 to GUIN7,
VIL2
BVIN0 to BVIN7, BLANK, CSYNC
VSS1 – 0.3
0.8
V
HSYNC, RESET
NTSC
14.31818
MHz
fIN1
CLKI
PAL
17.734475
MHz
Clock frequency
PAL-M
14.3024459
MHz
NTSC
3.579545
MHz
fIN2
FSCIN
PAL
4.43361875
MHz
PAL-M
3.57561149
MHz
Allowable Operating Ranges at Ta = –20 to 75°C unless otherwise specified
Continued on next page.
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