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参数资料
| 型号： | LC89977M |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO14 |
| 封装： | MFP-14 |
| 文件页数： | 3/7页 |
| 文件大小： | 214K |
| 代理商： | LC89977M |
No. 5545-3/7
LC89977M
CONT
Mode(representative)
Chrominance signal delay (number of CCD stages)
Luminance signal delay (number of CCD stages)
Low
PAL/GBI
2H (1703.5) + 0H (1)
1H (848)
High
4.43NTSC
1H (845.5) + 0H (1)
1H (842)
Control Pin Functions
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Switching voltage level: low
VL
–0.3
0.0
+0.5
V
Switching voltage level: high
VH
2.0
5.0
6.0
V
Switching Voltage Levels
Function of the 3FSC Pin
This pin provides a 3fsc clock signal generated by the 3 × PLL frequency multiplier circuit.
Note: *Since the control pins have built-in pull-down resistors (about 70 k), leaving these pins opens effectively sets them to the low level.
Continued on next page.
Parameter
Symbol
Switch states
Ratings
Unit
SW1
SW2
SW3
Test conditions
min
typ
max
IDD-1
aab
*1
Supply current
IDD-2
bab
*1
27
32
37
mA
[Chrominance signal characteristics] (with no input to Y-IN)
VINC-1
aab
*2
DC output voltage
VINC-2
bab
*2
1.9
2.4
2.9
V
VOUTC-1
aab
*2
VOUTC-2
bab
*2
1.4
1.9
2.4
V
GVC-1
aab
*3
Voltage gain
GVC-2
bab
*3
–2
0
+2
dB
CD-1
aab
*4
Comb depth
CD-2
bab
*4
–40
–35
dB
LNC-1
aab
*5
Linearity
LNC-2
bab
*5
–0.3
0.0
+0.3
dB
LCK3C-1
aab
*6
Clock leakage (3fsc)
LCK3C-2
bab
*6
10
50
mVrms
LCK1C-1
aab
*6
Clock leakage (fsc)
LCK1C-2
bab
*6
0.5
1.5
mVrms
NC-1
aab
*7
Noise
NC-2
bab
*7
0.5
2.0
mVrms
ZOC-1
aa
a, b
*8
Output impedance
ZOC-2
ba
a, b
*8
200
350
500
TDC-1
aab
*9
0-H delay time
TDC-2
bab
*9
130
ns
Electrical Characteristics at VDD = 5.0 V, Ta = 25C, FCLK = 4.43361875 MHz, VCLK = 500 mVp-p
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