参数资料
型号: LCMXO1200C-3FTN256C
厂商: Lattice Semiconductor Corporation
文件页数: 24/88页
文件大小: 0K
描述: IC PLD 1200LUTS 211I/O 256-BGA
标准包装: 90
系列: MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 5.1ns
电压电源 - 内部: 1.71 V ~ 3.465 V
宏单元数: 600
输入/输出数: 211
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 256-LBGA
供应商设备封装: 256-FTBGA(17x17)
包装: 托盘
其它名称: 220-1175
Architecture
MachXO Family Data Sheet
the system. These capabilities make the MachXO ideal for many multiple power supply and hot-swap applica-
tions.
Sleep Mode
The MachXO “C” devices (V CC = 1.8/2.5/3.3V) have a sleep mode that allows standby current to be reduced dra-
matically during periods of system inactivity. Entry and exit to Sleep mode is controlled by the SLEEPN pin.
During Sleep mode, the logic is non-operational, registers and EBR contents are not maintained, and I/Os are tri-
stated. Do not enter Sleep mode during device programming or configuration operation. In Sleep mode, power sup-
plies are in their normal operating range, eliminating the need for external switching of power supplies. Table 2-11
compares the characteristics of Normal, Off and Sleep modes.
Table 2-11. Characteristics of Normal, Off and Sleep Modes
Characteristic
SLEEPN Pin
Static Icc
I/O Leakage
Power Supplies VCC/VCCIO/VCCAUX
Logic Operation
I/O Operation
JTAG and Programming circuitry
EBR Contents and Registers
Normal
High
Typical <10mA
<10μA
Normal Range
User Defined
User Defined
Operational
Maintained
Off
0
<1mA
0
Non Operational
Tri-state
Non-operational
Non-maintained
Sleep
Low
Typical <100uA
<10μA
Normal Range
Non operational
Tri-state
Non-operational
Non-maintained
SLEEPN Pin Characteristics
The SLEEPN pin behaves as an LVCMOS input with the voltage standard appropriate to the VCC supply for the
device. This pin also has a weak pull-up, along with a Schmidt trigger and glitch filter to prevent false triggering. An
external pull-up to VCC is recommended when Sleep Mode is not used to ensure the device stays in normal oper-
ation mode. Typically, the device enters sleep mode several hundred nanoseconds after SLEEPN is held at a valid
low and restarts normal operation as specified in the Sleep Mode Timing table. The AC and DC specifications por-
tion of this data sheet shows a detailed timing diagram.
Oscillator
Every MachXO device has an internal CMOS oscillator. The oscillator can be routed as an input clock to the clock
tree or to general routing resources. The oscillator frequency can be divided by internal logic. There is a dedicated
programming bit to enable/disable the oscillator. The oscillator frequency ranges from 18MHz to 26MHz.
Configuration and Testing
The following section describes the configuration and testing features of the MachXO family of devices.
IEEE 1149.1-Compliant Boundary Scan Testability
All MachXO devices have boundary scan cells that are accessed through an IEEE 1149.1 compliant test access
port (TAP). This allows functional testing of the circuit board, on which the device is mounted, through a serial scan
path that can access all critical logic nodes. Internal registers are linked internally, allowing test data to be shifted in
and loaded directly onto test nodes, or test data to be captured and shifted out for verification. The test access port
consists of dedicated I/Os: TDI, TDO, TCK and TMS. The test access port shares its power supply with one of the
VCCIO Banks (MachXO256: V CCIO1 ; MachXO640: V CCIO2 ; MachXO1200 and MachXO2280: V CCIO5 ) and can
operate with LVCMOS3.3, 2.5, 1.8, 1.5, and 1.2 standards.
For more details on boundary scan test, please see information regarding additional technical documentation at
the end of this data sheet.
2-21
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LCMXO1200C-3FTN256I 功能描述:CPLD - 复杂可编程逻辑器件 1200 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO1200C-3M132C 功能描述:CPLD - 复杂可编程逻辑器件 1200 LUTs 101 IO 1.8 /2.5/3.3V -3 Spd RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO1200C-3M132I 功能描述:CPLD - 复杂可编程逻辑器件 1200 LUTs 101 IO 1.8 /2.5/3.3V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO1200C-3MN132C 功能描述:CPLD - 复杂可编程逻辑器件 1200 LUTs 101 IO 1.8 /2.5/3.3V -3 Spd RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO1200C-3MN132I 功能描述:CPLD - 复杂可编程逻辑器件 1200 LUTs 101 IO 1.8 /2.5/3.3V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100