参数资料
型号: LCMXO640E-3TN100C
厂商: Lattice Semiconductor Corporation
文件页数: 87/88页
文件大小: 0K
描述: IC PLD 640LUTS 74I/O 100-TQFP
标准包装: 90
系列: MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 4.9ns
电压电源 - 内部: 1.14 V ~ 1.26 V
宏单元数: 320
输入/输出数: 74
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
其它名称: 220-1195
Revision History
MachXO Family Data Sheet
Date
April 2006
(cont.)
Version
02.0
(cont.)
Section
Architecture
(cont.)
Change Summary
“Top View of the MachXO1200 Device” figure updated.
“Top View of the MachXO640 Device” figure updated.
“Top View of the MachXO256 Device” figure updated.
“Slice Diagram” figure updated.
Slice Signal Descriptions table updated.
Routing section updated.
sysCLOCK Phase Lockecd Loops (PLLs) section updated.
PLL Diagram updated.
PLL Signal Descriptions table updated.
sysMEM Memory section has been updated.
PIO Groups section has been updated.
PIO section has been updated.
MachXO PIO Block Diagram updated.
Supported Input Standards table updated.
MachXO Configuration and Programming diagram updated.
DC and Switching
Recommended Operating Conditions table - footnotes updated.
Characteristics
MachXO256 and MachXO640 Hot Socketing Specifications - footnotes
updated.
Added MachXO1200 and MachXO2280 Hot Socketing Specifications
table.
DC Electrical Characteristics, footnotes have been updated.
Supply Current (Sleep Mode) table has been updated, removed "4W"
references. Footnotes have been updated.
Supply Current (Standby) table and associated footnotes updated.
Intialization Supply Current table and footnotes updated.
Programming and Erase Flash Supply Current table and associated
footnotes have been updatd.
Register-to-Register Performance table updated (rev. A 0.19).
MachXO External Switching Characteristics updated (rev. A 0.19).
MachXO Internal Timing Parameters updated (rev. A 0.19).
MachXO Family Timing Adders updated (rev. A 0.19).
sysCLOCK Timing updated (rev. A 0.19).
MachXO "C" Sleep Mode Timing updated (A 0.19).
JTAG Port Timing Specification updated (rev. A 0.19).
Test Fixture Required Components table updated.
Pinout Information
Ordering Information
Signal Descriptions have been updated.
Pin Information Summary has been updated. Footnote has been
added.
Power Supply and NC Connection table has been updated.
Logic Signal Connections have been updated (PCLKTx_x --> PCLKx_x)
Removed "4W" references.
Added 256-ftBGA Ordering Part Numbers for MachXO640.
May 2006
02.1
Pinout Information
Removed [LOC][0]_PLL_RST from Signal Description table.
PCLK footnote has been added to all appropriate pins.
August 2006
02.2
Multiple
Removed 256 fpBGA information for MachXO640.
7-2
相关PDF资料
PDF描述
GRM31MF51A106ZA01L CAP CER 10UF 10V Y5V 1206
RCM08DSEI CONN EDGECARD 16POS .156 EYELET
GSA44DTBI CONN EDGECARD 88POS R/A .125 SLD
TAJV107M025RNJ CAP TANT 100UF 25V 20% 2924
VI-B5H-CY-F4 CONVERTER MOD DC/DC 52V 50W
相关代理商/技术参数
参数描述
LCMXO640E-3TN100I 功能描述:CPLD - 复杂可编程逻辑器件 640 LUTs 74 IO 1.2V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO640E-3TN144C 功能描述:CPLD - 复杂可编程逻辑器件 640 LUTs 113 IO 1.2V -3 Spd RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO640E-3TN144I 功能描述:CPLD - 复杂可编程逻辑器件 640 LUTs 113 IO 1.2V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO640E-4B256C 功能描述:CPLD - 复杂可编程逻辑器件 640 LUTs 159 I/O 1.2V -4 SPD RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO640E-4B256I 功能描述:CPLD - 复杂可编程逻辑器件 640 LUTs 159 I/O 1.2V -4 SPD RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100