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参数资料
型号： LFECP33E-5FN672C
厂商： Lattice Semiconductor Corporation
文件页数： 71/163页
文件大小： 0K
描述： IC FPGA 32.8KLUTS 672FPBGA
产品培训模块： LatticeECP3 Introduction
标准包装： 40
系列： ECP
逻辑元件/单元数： 32800
RAM 位总计： 434176
输入/输出数： 496
电源电压： 1.14 V ~ 1.26 V
安装类型： 表面贴装
工作温度： 0°C ~ 85°C
封装/外壳： 672-BBGA
供应商设备封装： 672-FPBGA（27x27）
7-2
Revision History
LatticeECP/EC Family Data Sheet
December 2004
01.4
Architecture
Updated Hot Socketing Recommended Power Up Sequence section.
Pinout Information
Added LFEC1, LFEC3, LFECP/EC10, LFECP/EC15 to Pin Information
Added LFEC1, LFEC3, LFECP/EC10, LFECP/EC15 to Power Supply
and NC Connections
Added LFEC1 and LFEC3 100 TQFP Pinout
Added LFEC1 and LFEC3 144 TQFP Pinout
Added LFEC1, LFEC3 and LFECP/EC10 208 PQFP Pinout
Added LFEC3, LFECP/EC10 and LFECP/EC15 256 fpBGA Pinout
Added LFECP/EC10 and LFECP/EC15 484 fpBGA Pinout
Ordering Information
Added Lead-Free Package Designators
Added Lead-Free Ordering Part Numbers
Supplemental
Information
Updated list of technical notes.
April 2005
01.5
Architecture
EBR memory support section has been updated with clarification.
Updated sysIO buffer pair section.
DC & Switching
Characteristics
Hot Socketing Specification has been updated.
DC Electrical Characteristics table (IIL, IIH) has been updated.
Supply Current (Standby) table has been updated.
Initialization Supply Current table has been updated.
External Switching Characteristics section has been updated.
Removed tRSTW spec. from PLL Parameter table.
tRST specifications have been updated.
sysCONFIG Port Timing Specifications (tBSCL, tIODISS, tPRGMRJ) have
been updated.
Pinout Information
Added LFECP/EC33 Pinout Information
Pin Information Summary table has been updated.
Power Supply and NC Connection table has been updated.
484-fpBGA logic connection has been updated (Ball # J6, J17, P6 and
P17 for ECP/EC33 are now called VCCPLL).
672-fpBGA logic connection has been updated (Ball # K19, L8, U19, U8
for ECP/EC33 are now called VCCPLL).
May 2005
01.6
Introduction
ECP/EC33 EBR SRAM Bits and Blocks have been updated to 498K and
54 respectively.
Architecture
Table 2-10 has been updated (ECP/EC33 EBR SRAM Bits and Blocks
have been updated to 498K and 54 respectively.)
Recommended Power Up Sequence section has been removed.
DC & Switching
Characteristics
Supply Current (Standby) table has been updated.
Initialization Supply Current table has been updated.
Vos test condition has been updated to (VOP+VOM)/2.
Register-to-Register performance table has been updated (rev. G 0.27).
External switching characteristics have been updated (rev. G 0.27).
Internal timing parameters have been updated (rev. G 0.27).
Timing adders have been updated (rev. G 0.27).
sysCONFIG port timing specifications have been updated.
Pinout Information
Pin Information Summary table has been updated.
Power Supply and NC Connection table has been updated.
Ordering Information
OPN list has been updated.
Date
Version
Section
Change Summary
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LFECP33E-5FN672I 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
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