参数资料
型号: LFECP6E-3TN144C
厂商: Lattice Semiconductor Corporation
文件页数: 2/163页
文件大小: 0K
描述: IC FPGA 6.1KLUTS 97I/O 144-TQFP
标准包装: 60
系列: ECP
逻辑元件/单元数: 6100
RAM 位总计: 94208
输入/输出数: 97
电源电压: 1.14 V ~ 1.26 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 144-LQFP
供应商设备封装: 144-TQFP(20x20)
2-7
Architecture
LatticeECP/EC Family Data Sheet
Routing
There are many resources provided in the LatticeECP/EC devices to route signals individually or as busses with
related control signals. The routing resources consist of switching circuitry, buffers and metal interconnect (routing)
segments.
The inter-PFU connections are made with x1 (spans two PFU), x2 (spans three PFU) and x6 (spans seven PFU).
The x1 and x2 connections provide fast and efficient connections in horizontal and vertical directions. The x2 and
x6 resources are buffered, the routing of both short and long connections between PFUs.
The ispLEVER design tool suite takes the output of the synthesis tool and places and routes the design. Generally,
the place and route tool is completely automatic, although an interactive routing editor is available to optimize the
design.
Clock Distribution Network
The clock inputs are selected from external I/O, the sysCLOCK PLLs or routing. These clock inputs are fed
through the chip via a clock distribution system.
Primary Clock Sources
LatticeECP/EC devices derive clocks from three primary sources: PLL outputs, dedicated clock inputs and routing.
LatticeECP/EC devices have two to four sysCLOCK PLLs, located on the left and right sides of the device. There
are four dedicated clock inputs, one on each side of the device. Figure 2-6 shows the 20 primary clock sources.
Figure 2-6. Primary Clock Sources
From Routing
Clock Input
From Routing
PLL Input
Clock Input
PLL Input
Clock Input
PLL Input
From Routing
Clock Input
From Routing
PLL
20 Primary Clock Sources
To Quadrant Clock Selection
Note: Smaller devices have two PLLs.
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LFECP6E-3TN144I 功能描述:FPGA - 现场可编程门阵列 6.1 LUT 97 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
LFECP6E-4F256C 功能描述:FPGA - 现场可编程门阵列 6.1 LUT 195 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
LFECP6E-4F256I 功能描述:FPGA - 现场可编程门阵列 6.1 LUT 195 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
LFECP6E-4F484C 功能描述:FPGA - 现场可编程门阵列 6.1 LUT 224 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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