- 您现在的位置：买卖IC网 > PDF目录369759 > LH28F160BJB-BTL90 Flash ROM PDF资料下载
参数资料
| 型号： | LH28F160BJB-BTL90 |
| 英文描述： | Flash ROM |
| 中文描述： | 闪存ROM |
| 文件页数： | 34/56页 |
| 文件大小： | 373K |
| 代理商： | LH28F160BJB-BTL90 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页当前第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页
- 34 -
LH28F160S5-L/S5H-L
RY/BY# mode) will remain low until the reset
operation is complete. Then, the operation will abort
and the device will enter deep power-down. The
aborted operation may leave data partially altered.
Therefore, the command sequence must be
repeated after normal operation is restored. Device
power-off or RP# transitions to V
IL
clear the status
register.
The CUI latches commands issued by system
software and is not altered by V
PP
or CE#
transitions or WSM actions. Its state is read array
mode upon power-up, after exit from deep power-
down or after V
CC
transitions below V
LKO
.
After block erase, full chip erase, (multi) word/byte
write or block lock-bit configuration, even after V
PP
transitions down to V
PPLK
, the CUI must be placed
in read array mode via the Read Array command if
subsequent access to the memory array is desired.
5.6
The device is designed to offer protection against
accidental block and full chip erasure, (multi)
word/byte writing or block lock-bit configuration
during power transitions. Upon power-up, the
device is indifferent as to which power supply (V
PP
or V
CC
) powers-up first. Internal circuitry resets the
CUI to read array mode at power-up.
Power-Up/Down Protection
A system designer must guard against spurious
writes for V
CC
voltages above V
LKO
when V
PP
is
active. Since both WE# and CE# must be low for a
command write, driving either to V
IH
will inhibit
writes. The CUI’s two-step command sequence
architecture provides added level of protection
against data alteration.
In-system block lock and unlock capability prevents
inadvertent data alteration. The device is disabled
while RP# = V
IL
regardless of its control inputs
state.
5.7
When designing portable systems, designers must
consider battery power consumption not only during
device operation, but also for data retention during
system idle time. Flash memory’s nonvolatility
increases usable battery life because data is
retained when system power is removed.
Power Consumption
In addition, deep power-down mode ensures
extremely low power consumption even when
system power is applied. For example, portable
computing products and other power sensitive
applications that use an array of devices for solid-
state storage can consume negligible power by
lowering RP# to V
IL
standby or sleep modes. If
access is again needed, the devices can be read
following the t
PHQV
and t
PHWL
wake-up cycles
required after RP# is first raised to V
IH
. See
Section
6.2.4 through 6.2.6
"
AC CHARACTERISTICS -
READ-ONLY and WRITE OPERATIONS"
and
Fig. 15
,
Fig. 16
,
Fig. 17
and
Fig. 18
for more
information.
相关PDF资料 |
PDF描述 |
|---|---|
| LH28F160S3HNS-L10 | Flash ROM |
| LH28F160S3HNS-L12 | EEPROM |
| LH28F160S3HR-L10 | x8/x16 Flash EEPROM |
| LH28F160S3HR-L13 | EEPROM|FLASH|1MX16/2MX8|CMOS|TSSOP|56PIN|PLASTIC |
| LH28F160S3HT-L10 | x8/x16 Flash EEPROM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LH28F160BJB-TTL90 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Flash ROM |
| LH28F160BJB-TTLZS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Flash ROM |
| LH28F160BJE-BTL90 | 功能描述:IC FLASH 16MBIT 90NS 48TSOP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并联 电源电压:2.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
| LH28F160BJE-TTL90 | 制造商:Sharp Microelectronics Corporation 功能描述:NOR Flash Parallel 3.3V 16Mbit 2M/1M x 8bit/16bit 90ns 48-Pin TSOP |
| LH28F160BJHB-BTL90 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Flash ROM |
发布紧急采购，3分钟左右您将得到回复。