参数资料
型号: LIS3LV02DQ
厂商: STMICROELECTRONICS
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC28
封装: 7 X 7 MM, 1.9 MM HEIGHT, PLASTIC, QFN-28
文件页数: 9/42页
文件大小: 379K
代理商: LIS3LV02DQ
LIS3LV02DQ
5 Digital Interfaces
CD00047926
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5
Digital Interfaces
The registers embedded inside the LIS3LV02DQ may be accessed through both the I2C and
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I2C interface, CS
line must be tied high (i.e connected to Vdd_IO).
Table 6.
Serial interface pin description
5.1
I2C Serial Interface
The LIS3LV02DQ I2C is a bus slave. The I2C is employed to write the data into the registers
whose content can also be read back.
The relevant I2C terminology is given in the table below
Table 7.
Serial interface pin description
There are two signals associated with the I2C bus: the Serial Clock Line (SCL) and the Serial
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data to/from
the interface. Both the lines are connected to Vdd_IO through a pull-up resistor embedded
inside the LIS3LV02DQ. When the bus is free both the lines are high.
The I2C interface is compliant with Fast Mode (400 kHz) I2C standards as well as the Normal
Mode.
PIN Name
PIN Description
CS
SPI enable
I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
SCL/SPC
I2C Serial Clock (SCL)
SPI Serial Port Clock (SPC)
SDA/SDI/SDO
I2C Serial Data (SDA)
SPI Serial Data Input (SDI)
3-wire Interface Serial Data Output (SDO)
SDO
SPI Serial Data Output (SDO)
Term
Description
Transmitter
The device which sends data to the bus
Receiver
The device which receives data from the bus
Master
The device which initiates a transfer, generates clock signals and terminates a
transfer
Slave
The device addressed by the master
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