where, C
OUT (F) is the minimum required output capacitance,
L (H) is the value of the inductor, V
DROOP (V) is the output
voltage drop ignoring loop bandwidth considerations,
ΔI
OUT-
STEP (A) is the load step change, RESR () is the output
capacitor ESR, V
IN (V) is the input voltage, and VOUT (V) is
the set regulator output voltage. Both the tolerance and volt-
age coefficient of the capacitor should be examined when
designing for a specific output ripple or transient droop target.
INPUT CAPACITOR SELECTION
Good quality input capacitors are necessary to limit the ripple
voltage at the VIN pin while supplying most of the switch cur-
rent during the on-time. In general it is recommended to use
a ceramic capacitor for the input as they provide both a low
impedance and small footprint. One important note is to use
a good dielectric for the ceramic capacitor such as X5R or
X7R. These provide better over temperature performance
and also minimize the DC voltage derating that occurs on Y5V
capacitors. The input capacitors C
IN1 and CIN2 should be
placed as close as possible to the VIN and GND pins on both
sides of the device.
Non-ceramic input capacitors should be selected for RMS
current rating and minimum ripple voltage. A good approxi-
mation for the required ripple current rating is given by the
relationship:
As indicated by the RMS ripple current equation, highest re-
quirement for RMS current rating occurs at 50% duty cycle.
For this case, the RMS ripple current rating of the input ca-
pacitor should be greater than half the output current. For best
performance, low ESR ceramic capacitors should be placed
in parallel with higher capacitance capacitors to provide the
best input filtering for the device.
SETTING THE OUTPUT VOLTAGE (R
FB1, RFB2)
The resistors R
FB1 and RFB2 are selected to set the output
voltage for the device. provides suggestions for R
FB1 and
R
FB2 for common output voltages.
TABLE 1. Suggested Values for R
FB1 and RFB2
R
FB1(k)
R
FB2(k)
V
OUT
short
open
0.8
4.99
10
1.2
8.87
10.2
1.5
12.7
10.2
1.8
21.5
10.2
2.5
31.6
10.2
3.3
52.3
10
5.0
If different output voltages are required, R
FB2 should be se-
lected to be between 4.99 k
to 49.9 k and R
FB1 can be
calculated using the equation below.
LOOP COMPENSATION (R
C1, CC1)
The purpose of loop compensation is to meet static and dy-
namic performance requirements while maintaining adequate
stability. Optimal loop compensation depends on the output
capacitor, inductor, load and the device itself. Table 2 below
gives values for the compensation network that will result in
a stable system when using a 150 F, 6.3V POSCAP (6TP-
B150MAZB) output capacitor.
TABLE 2. Recommended Compensation for
C
OUT = 150 F, IOUT = 3A
V
IN
V
OUT
L (H)
R
C (k)
C
C1 (nF)
12
5
6.8
45.3
4.7
12
3.3
5.6
32.4
4.7
12
2.5
4.7
30.9
3.3
12
1.5
3.3
19.1
3.3
12
1.2
2.2
21.5
2.2
12
0.8
1.5
15
2.2
5
3.3
2.2
29.4
2.2
5
2.5
3.3
37.4
2.2
5
1.5
2.2
26.7
2.2
5
1.2
2
22.1
2.2
5
0.8
1.5
15
2.2
If the desired solution differs from the table above the loop
transfer function should be analyzed to optimize the loop
compensation. The overall loop transfer function is the prod-
uct of the power stage and the feedback network transfer
functions. For stability purposes, the objective is to have a
loop gain slope that is -20dB/decade from a very low frequen-
cy to beyond the crossover frequency.
Figure 3 shows the
transfer functions for power stage, feedback/compensation
network, and the resulting compensated loop for the
LM20323A.
30077272
FIGURE 3. LM20323A Loop Compensation
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12
LM20323A