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参数资料
| 型号： | LM2320-9ERD3AF |
| 厂商： | POWER-ONE INC |
| 元件分类： | 电源模块 |
| 英文描述： | 2-OUTPUT 50 W AC-DC REG PWR SUPPLY MODULE |
| 封装： | METAL, CASE M02, MODULE |
| 文件页数： | 16/24页 |
| 文件大小： | 982K |
| 代理商： | LM2320-9ERD3AF |
Cassette Style
AC-DC Converters
M Series
Edition 5/5.2000
23/24
3
5.1 V
4.875 V
0
U
i [V DC]
0
t
U
ti + Uhi
U
ti
Input voltage failure
Switch-on cycle
Input voltage sag
Switch-on cycle and subsequent
input voltage failure
U
V high
U
V low
U
V
0
V2
t
U
o1
0
U
V high
U
V low
U
V
0
V2
U
i
U
ti
4
Output voltage failure
0
U
V high
U
V low
U
V
3
U
ti + Uhi
t
low min
2
t
low min
2
t
low min
2
3
4
U
V high
U
V low
U
V
0
V3
t
3
t
low min
2
t
low min
2
3
t
h
1
2.0 V
t
h
1
4
3
4
t
low min
2
V3
5.1 V
4.875 V
0
U
o1
2.0 V
Input voltage monitoring
Output voltage monitoring
11010
t
Threshold tolerances and hysteresis:
If
Ui is monitored, the internal input voltage is measured af-
ter the input filter and rectifier. Consequently this voltage
differs from the voltage at the connector pins by the voltage
drop
DUti across input filter and rectifier. The threshold level
of option V0 is factory adjusted at
Io nom and TA = 25°C. The
value of
DUti depends upon the threshold level Uti , tem-
perature and input current. The input current is a function of
input voltage and output power.
Fig. 30
Relationship between Ui, Uo1, UV, IV and Uo1/Uo nom versus time.
1 VME request: minimum 4 ms
2 tlow min = 40...200 ms, typically 80 ms
3 UV level not defined at Uo1 < 2.0 V
4 The V signal drops simultaneously with the output voltage, if the
pull-up resistor
Rp is connected to Vo1+. The V signal remains
high if
Rp is connected to an external source.
DUti
Uhi
UV low
UV
UV high
Ui
P
o
=
P
o
nom
P
o
=
0
P
o
=
0
Uti
P
o
=
P
o
nom
11023
Fig. 29
Definition of Uti, DUti and Uhi
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