参数资料
型号: LM2575D2T-ADJG
厂商: ON Semiconductor
文件页数: 20/28页
文件大小: 0K
描述: IC REG BUCK ADJ 1A D2PAK
标准包装: 50
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.23 V ~ 37 V
输入电压: 4.75 V ~ 40 V
PWM 型: 电压模式
频率 - 开关: 52kHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: TO-263-6,D²Pak(5 引线+接片),TO-263BA
包装: 管件
供应商设备封装: D2PAK
其它名称: LM2575D2T-ADJG-ND
LM2575D2T-ADJGOS
LM2575, NCV2575
Using a delayed startup arrangement, the input capacitor
can charge up to a higher voltage before the switch ? mode
regulator begins to operate.
The high input current needed for startup is now partially
supplied by the input capacitor C in .
Design Recommendations:
The inverting regulator operates in a different manner
than the buck converter and so a different design procedure
has to be used to select the inductor L1 or the output
capacitor C out .
The output capacitor values must be larger than is
5.0 V
0
On
Off
+V in
Shutdown
Input
R3
470
C in R1
100 m F 47 k
+V in
1
5
LM2575 ? XX
ON/OFF 3
GND
R2
47 k
-V out
x t on
[ Load
in
O
in
peak
2L 1
V
O
1 , and f
where t on +
osc + 52 kHz.
fosc
V
) |V |
normally required for buck converter designs. Low input
voltages or high output currents require a large value output
capacitor (in the range of thousands of m F).
The recommended range of inductor values for the
inverting converter design is between 68 m H and 220 m H. To
select an inductor with an appropriate current rating, the
inductor peak current has to be calculated.
The following formula is used to obtain the peak inductor
current:
I (V ) |V |) V
I )
in
|V |
x
in O
MOC8101
NOTE: This picture does not show the complete circuit.
Figure 27. Inverting Buck ? Boost Regulator Shut Down
Circuit Using an Optocoupler
With the inverting configuration, the use of the ON/OFF
pin requires some level shifting techniques. This is caused
by the fact, that the ground pin of the converter IC is no
longer at ground. Now, the ON/OFF pin threshold voltage
(1.4 V approximately) has to be related to the negative
output voltage level. There are many different possible shut
down methods, two of them are shown in Figures 27 and 28.
Under normal continuous inductor current operating
conditions, the worst case occurs when V in is minimal.
Note that the voltage appearing across the regulator is the
absolute sum of the input and output voltage, and must not
exceed 40 V.
+V in
+V
0
On
Off
R2
5.6 k
Shutdown
Input
+V in
100 m F
4
100 m H
Unregulated
DC Input
12 V to 25 V
C in
C1
/50 V 0.1 m F
+V in
1
LM2575 ? 12
5 ON/OFF 3
Feedback
Output
2
GND
L1
C in
100 m F
1
Q1
2N3906
5
LM2575 ? XX
ON/OFF 3
GND
R1
47 k
R2
D1
1N5819
C out
1800 m F
/16 V
R1
12 k
-V out
47 k
NOTE: This picture does not show the complete circuit.
Regulated
Output
-12 V @ 0.35 A
Figure 26. Inverting Buck ? Boost
Regulator with Delayed Startup
It has been already mentioned above, that in some
situations, the delayed startup or the undervoltage lockout
features could be very useful. A delayed startup circuit
applied to a buck ? boost converter is shown in Figure 26 .
Figure 32 in the “Undervoltage Lockout” section describes
an undervoltage lockout feature for the same converter
topology.
Figure 28. Inverting Buck ? Boost Regulator Shut Down
Circuit Using a PNP Transistor
Negative Boost Regulator
This example is a variation of the buck ? boost topology
and is called a negative boost regulator. This regulator
experiences relatively high switch current, especially at low
input voltages. The internal switch current limiting results in
lower output load current capability.
The circuit in Figure 29 shows the negative boost
configuration. The input voltage in this application ranges
from ? 5.0 V to ? 12 V and provides a regulated ? 12 V output.
http://onsemi.com
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