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参数资料
| 型号： | LM2702MT-ADJ/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC MODULE PANEL TFT DISP 16TSSOP |
| 标准包装： | 92 |
| 应用： | LCD 显示器 |
| 电流 - 电源： | 2.6mA |
| 电源电压： | 2.2 V ~ 12 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
| 其它名称： | *LM2702MT-ADJ *LM2702MT-ADJ/NOPB LM2702MT-ADJ |
OBSOLETE
SNVS206D – NOVEMBER 2002 – REVISED APRIL 2013
Pin Functions
Vcom+(Pin 1): Positive input terminal of Vcom amplifier.
Vcom ? (Pin 2): Negative input terminal of Vcom amplifier.
Vcom(Pin 3) : Output terminal of Vcom amplifier.
Delay(Pin 4): PMOS switch delay control pin. See Operation section for setting the delay time.
The delay time begins when the output voltage of the DC/DC switching regulator reaches 85% of its true output
voltage. This corresponds to a FB voltage of about 1.1V. The PMOS switch is controlled with both the delay time
and the switch control pin, SWC. If no Cdelay capacitor is used, the PMOS switch is controlled solely with the
SWC pin.
Css(Pin 5): Softstart pin. Connect capacitor to Css pin and AGND plane to slowly ramp inductor current on
startup. See Operation section for setting the softstart time.
V C (Pin 6): Compensation Network for Boost switching regulator. Connect resistor/capacitor network between V C
pin and AGND for boost switching regulator AC compensation.
FB(Pin 7): Feedback pin. Set the output voltage by selecting values of R1 and R2 using:
f PC =
1
2 S (R C + R O )C C
Hz
Connect the ground of the feedback network to the AGND plane, which should be tied directly to the GND pin.
GND(Pin 8): Ground connect for LM2702. Connect all sensitive circuitry, ie. feedback resistors, softstart
capacitor, delay capacitor, and compensation network to a dedicated AGND plane which connects directly to this
pin. Connect all power ground components to a PGND plane which should also connect directly to this pin.
Please see Layout Considerations under the Operation section for more details on layout suggestions.
SW(Pin 9): This is the drain of the internal NMOS power switch. Minimize the metal trace area connected to this
pin to minimize EMI.
V IN (Pin 10): Input Supply Pin. Bypass this pin with a capacitor as close to the device as possible. The capacitor
should connect between V IN and GND.
SWI(Pin 11): PMOS switch input. Source connection of PMOS device.
SWO(Pin 12): PMOS switch output. Drain connection of PMOS device.
SWC(Pin13): PMOS switch control pin. This pin creates an AND function with the delay time after the output of
the switching regulator has reached 85% of its nominal value. To ensure the PMOS switch is in the correct state,
apply a voltage above 1.5V to this pin to turn on the PMOS switch and apply a voltage below 0.7V to turn off the
PMOS switch.
AV IN (Pin 14): Supply pin for the Vcom opamp and the Gamma buffer. Bypass this pin with a capacitor as close
to the device as possible, about 100nF. The capacitor should connect between AV IN and PGND.
GMA(Pin 15): Gamma Buffer output pin.
GMA+(Pin 16): Gamma Buffer input pin.
Copyright ? 2002–2013, Texas Instruments Incorporated
Product Folder Links: LM2702
3
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| LM2702MTX-ADJ | 制造商:NSC 制造商全称:National Semiconductor 功能描述:TFT Panel Module |
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