参数资料
型号: LM3686TLE-AAED/NOPB
厂商: National Semiconductor
文件页数: 9/27页
文件大小: 0K
描述: IC REG BUCK SYNC .9A TRPL 12USMD
标准包装: 1
类型: 降压(降压)
输出类型: 固定
输出数: 3
输出电压: 1.2V,1.8V,2.8V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流/电压模式
频率 - 开关: 3MHz
电流 - 输出: 900mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-WFBGA
包装: 标准包装
供应商设备封装: 12-uSMD
产品目录页面: 1288 (CN2011-ZH PDF)
其它名称: LM3686TLE-AAED/NOPBDKR
LM3686TLE-AAEDDKR
LM3686TLE-AAEDDKR-ND

Electrical Characteristics
DC-DC Converter (1) (2) (3) (4)
SNVS520E – AUGUST 2008 – REVISED MAY 2013
Symbol
V FB_DCDC
Parameter
Feedback Voltage
Accuracy
PWM Mode (5)
Conditions
Min
1.746
Limit
Typ
1.8
Max
1.836
Units
V
V REF
Internal reference
voltage
0.5
V
R DSON(P)
R DSON(N)
I Q_AUTO
Pin-Pin Resistance for
PFET
Pin-Pin Resistance for
NFET
Quiescent current for
auto mode
V BATT = 3.6V
I SW = 100 mA
V BATT = 3.6V
I SW = 100 mA
No load, device is not switching, FB = HIGH
350
150
28
450
250
40
m ?
m ?
μA
I LIM
F OSC
Switch peak current
limit
Internal Oscillator
Frequency
Open loop
PWM Mode
1.035
2.4
1.220
3
1.375
3.4
A
MHz
(1)
(2)
(3)
(4)
(5)
All voltages are with respect to the potential at the GND pin.
Min and Max limits are specified by design, test, or statistical analysis. Typical (typ.) numbers represent the most likely norm. Unless
otherwise specified, conditions for typ. specifications are: V BATT = 3.6V and T A = 25°C.
The parameters in the electrical characteristic table are tested at V BATT = 3.6V unless otherwise specified. For performance over the
input voltage range refer to datasheet curves.
The input voltage range recommended for ideal applications performance for the specified output voltages is given below:V BATT = 2.7V
to 5.5V for 1.0V ≤ V OUT_DCDC < 1.8VV BATT = (V OUT_DCDC + 1V) to 5.5V for 1.8V ≤ V OUT_DCDC < 3.6V
Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle current
limit is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current
until output voltage drops by 10%.
Electrical Characteristics
Global Parameters (DCDC, LILO, & LDO) (1) (2) (3) (4)
Symbol
Parameter
Conditions
Min
Typical Limit
Typ
Max
Units
Full power mode
I Q_VBATT
Quiescent current into
V BATT
I OUT_DCDC = I OUT_LILO = I OUT_LDO = 0 mA, DC-DC
is not switching (FB_DCDC forced higher than
V OUT_DCDC )
100
130
μA
V en = 1.1V,
I Q_GLOBAL
Shutdown current into
V BATT
V EN_DCDC = V EN_LILO = V EN_LDO = 0V
2.5
4
μA
Enable Pins (EN_DCDC, EN_LILO, EN_LDO)
I EN
Enable pin input
current
All EN = 0V
.01
1
μA
V IH
V IL
Logic high input
Logic low input
1.1
0.40
V
V
(1)
(2)
(3)
(4)
All voltages are with respect to the potential at the GND pin.
Min and Max limits are specified by design, test, or statistical analysis. Typical (typ.) numbers represent the most likely norm. Unless
otherwise specified, conditions for typ. specifications are: V BATT = 3.6V and T A = 25°C.
The parameters in the electrical characteristic table are tested at V BATT = 3.6V unless otherwise specified. For performance over the
input voltage range refer to datasheet curves.
The input voltage range recommended for ideal applications performance for the specified output voltages is given below:V BATT = 2.7V
to 5.5V for 1.0V ≤ V OUT_DCDC < 1.8VV BATT = (V OUT_DCDC + 1V) to 5.5V for 1.8V ≤ V OUT_DCDC < 3.6V
Copyright ? 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM3686
9
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