参数资料
型号: LM3686TLX-AADW/NOPB
厂商: National Semiconductor
文件页数: 7/27页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.9A 12USMD
标准包装: 3,000
类型: 降压(降压)
输出类型: 可调式
输出数: 3
输出电压: 1.2 V ~ 2.5 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流/电压模式
频率 - 开关: 3MHz
电流 - 输出: 900mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-WFBGA
包装: 带卷 (TR)
供应商设备封装: 12-uSMD
其它名称: LM3686TLX-AADW

SNVS520E – AUGUST 2008 – REVISED MAY 2013
Electrical Characteristics
Linear Regulator — LILO (EN_DCDC = EN_LILO = ON - Large NMOS) (1)(2)(3)(4) (continued)
Limits in standard typeface are for T A = 25°C. Limits appearing in boldface type apply over the full operating ambient
temperature range: -40°C ≤ T A = T J ≤ +85°C. Unless otherwise noted, specifications apply to the closed loop typical
application circuits (linear regulator) with V IN_LDO = V BATT = 3.6V (5) , V IN_LILO = V OUT_DCDC(NOM) , V EN (All) = V BATT , C IN_DC = 4.7 μF,
C OUT_LILO = 2.2 μF , C IN_LDO = 1.0 μF , C OUT_LDO = 1.0 μF ,C OUT_DC = C IN_LILO = 10 μF
Symbol
Parameter
Condition
Min
Limits
Typ
Max
Units
LILO (EN_DCDC = OFF, EN_LILO = ON - SMALL NMOS)
Δ V OUT_LILO /
V OUT_LILO
Output Voltage
Accuracy,
I OUT = 1 mA to 50 mA
1.176
1.224
V
V OUT_LILO
Δ V OUT_LILO /
Δ V BATT
I SC_LILO
T STARTUP
Line Regulation
(Small NMOS) (8)
Short circuit current
Start up time
V IN_LILO = (V OUT_LILO + 0.3V) to 5.5V
V OUT_LILO = GND
EN to 0.95V OUT
70
0.4
70
1.5
mV/V
mA
μS
System Characteristic (9)
PSRR
Signal to V BATT = 3.6V,
Power Supply Rejection
Ratio (10)
V IN_LILO = 1.8V
I OUT = 200 mA,
f = 100 Hz
Signal to V IN_LILO = 1.8V
I OUT = 200 mA,
68
60
dB
f = 1kHz
e N_LILO
BW = 10 Hz to 100 kHz,
Output Noise voltage
(10)
V IN_LILO = 1.8V,
I OUT = 200 mA,
166
μV RMS
V IN_LDO = 3.6V
Δ V OUT_LILO
Δ V IN_LILO
Dynamic load transient
response
Dynamic line transient
response on V BATT
Pulsed load 1 mA - 350 mA
di/dt = 350 mA/1μS
V BATT = 3.1V to 3.7V
V IN_LILO = V OUT_DCDC
+/- 30 (11)
+/-15 (11)
mV
mV
tr, tf = 10 μS, I OUT = 200 mA
(8)
(9)
To calculate the output voltage from the line regulation specified, use the following equation: Δ V OUT = Line Regulation (%/V) x Nominal
V OUT (V) x Δ V IN (V).
Specified by design. Not production tested.
(10) The noise performance target is applied to PWM mode operation and this does not apply when DCDC converter is operating in PFM
mode.
(11) For line and load transient specifications, the + symbol represents an overshoot in the output voltage and the – symbol represents an
undershoot in the output voltage. The first value signifies overshoot or undershoot at the rising edge and the second value signifies the
overshoot or undershoot at the falling edge.
Electrical Characteristics
Linear Regulator — LDO (1) (2) (3) (4)
Symbol
V IN_LDO
Δ V OUT_LDO /V OUT_
LDO
Δ V OUT_LDO / Δ mA
Parameter
LDO input voltage range
Output voltage
accuracy,
V OUT_LDO
Load regulation (5)
Conditions
V IN = 3.6V
I OUT_LDO = 1 mA & 300 mA
I OUT_LDO = 1 mA & 300 mA
Min
2.7
2.744
2.94
Typical Limit
Typ
2.8
3.0
8
Max
5.5
2.856
3.06
Units
V
V
μV/mA
(1)
(2)
(3)
(4)
(5)
All voltages are with respect to the potential at the GND pin.
Min and Max limits are specified by design, test, or statistical analysis. Typical (typ.) numbers represent the most likely norm. Unless
otherwise specified, conditions for typ. specifications are: V BATT = 3.6V and T A = 25°C.
The parameters in the electrical characteristic table are tested at V BATT = 3.6V unless otherwise specified. For performance over the
input voltage range refer to datasheet curves.
The input voltage range recommended for ideal applications performance for the specified output voltages is given below:V BATT = 2.7V
to 5.5V for 1.0V ≤ V OUT_DCDC < 1.8VV BATT = (V OUT_DCDC + 1V) to 5.5V for 1.8V ≤ V OUT_DCDC < 3.6V
To calculate the output voltage from the load regulation specified, use the following equation: Δ V OUT = Load Regulation (%/mA) x
Nominal V OUT (V) x Δ I OUT (mA).
Copyright ? 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM3686
7
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