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参数资料
| 型号： | LM4546MWC |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, UUC |
| 封装： | WAFER |
| 文件页数： | 7/20页 |
| 文件大小： | 356K |
| 代理商： | LM4546MWC |
Application Information (Continued)
Register Descriptions
Reset Register (00h)
Writing any value to this register causes a register reset
which changes all of the registers back to their default val-
ues. If this register is read, the LM4546 will return a value of
0D50h indicating that National 3D Sound is implemented
and 18bit data is supported by both the ADCs and DACs.
Master Volume Registers (02h, 06h)
These two registers allow the output levels from LINE_OUT,
and MONO_OUT to be attenuated or muted. There are
6-bits of volume control, plus one mute bit. It is a 5-bit vol-
ume range, where each step is nominally 1.5dB and each
output can be individually muted by either setting the most
significant bit (Mx5), and/or the mute bit (D15) to
″1.″
Mute
Mx5:Mx0
Function
0
00 0000
0dB attenuation
0
01 1111
46.5dB attenuation
0
1X XXXX
46.5dB attenuation
1
XX XXXX
mute
Default: 8000h
PC Beep Register (0Ah)
This register controls the level of the PC_BEEP input. The
PC_BEEP can be both attenuated and muted via register
0Ah. Step size is nominally 3dB. The signal present after the
attenuation and mute block is summed into both the left and
right channels.
Mute
PV3:0
Function
0
0000
0dB attenuation
0
1111
45dB attenuation
1
XXXX
mute
Default: 0000h
Mixer Input Volume Registers (Index 0Ch - 12h, 18h)
These registers set the input volume levels including mute.
Each volume control is 5 bit which provides from a range of
+12dB gain to 34.5dB attenuation in 1.5dB steps. For stereo
ports, the left and right levels can be independently set. Mut-
ing a given port is accomplished by setting the MSB to 1.
Setting the MSB to 1 for stereo ports mutes both the left and
right channel. Register 0Eh has an additional 20dB boost for
a microphone level input. This is enabled by setting bit 6 of
register 0Eh to 1.
Mute
Gx4:Gx0
Function
0
00000
+12dB gain
0
01000
0dB gain
0
11111
34.5dB attenuation
1
XXXXX
mute
Default: 8008h (mono regs.), 8808h (stereo regs.)
Record Select Register (1Ah)
This register independently controls the source for the right
and left channel which will be recorded by the stereo ADC.
The default value is 0000h which corresponds to Mic in.
SL2:SL0
Left Record Source
0
Mic
1
CDIn(L)
2
not used
3
not used
4
Line In (L)
5
Stereo Mix (L)
6
Mono Mix (L)
7
Phone
SR2:SR0
Right Record Source
0
Mic
1
CDIn(R)
2
not used
3
not used
4
Line In (R)
5
Stereo Mix (R)
6
Mono Mix (R)
7
Phone
Record (Input) Gain Register (1Ch)
This registers controls the Record (Input) Gain level for the
stereo input selected via the Record Select Control Register
(1Ah). The gain can be programmed from 0dB to +22.5dB in
1.5dB steps. The level for the left and right channel can be
individually controlled. The input can also be muted by set-
ting the MSB to 1.
Mute
Gx3:Gx0
Function
0
1111
22.5dB gain
0
0000
0dB gain
1
XXXX
mute
Default: 8000h
General Purpose Register (20h)
This register controls many miscellaneous functions imple-
mented on the LM4546. The miscellaneous functions include
POP which allows the PCM to bypass the National 3D
Sound circuitry, 3D which enables or disables the National
3D Sound circuitry, MIX which selects the MONO_OUT
source, MS which selects the microphone mux source, and
LPBK which connects the output of the stereo ADC to the in-
put of the stereo DAC. LPBK provides a digital loopthru path
when enabled.
BIT
Function
POP
PCM out path and mute,0=pre 3D,1=
post 3D
3D
National 3D Sound on / off1=on
MIX
Mono output select0=Mix,1=Mic
MS
Mic select 0 = Mic1 1 = Mic2
LPBK
ADC/DAC loopback
Powerdown Control / Status Register (26h)
This read/write register is used to monitor subsystem readi-
ness and also to program the LM4546 powerdown states.
The lower half of this register is read only with a
″1″, indicat-
ing the subsection is ready. Writing to the lower 8 bits will
have no effect.
LM4546
www.national.com
15
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