参数资料
型号: LM85BIMQ/NOPB
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封装: QSOP-24
文件页数: 6/26页
文件大小: 261K
代理商: LM85BIMQ/NOPB
Functional Description (Continued)
Bit
Name
R/W
Default
Description
6
Zone 3 Limit
Exceeded
R
0
The LM85 automatically sets this bit to 1 when the temperature input
measured by the Remote2 and Remote2+ inputs is less than or equal to
the limit set in the Internal (Zone2) Low Temp register or greater than the
limit set in the Remote (Zone3) High Temp register. This bit will be set
when a diode fault is detected.
7
Error in Status
Register 2
R
0
If there is a set bit in Status Register 2, this bit will be set to 1.
4.9 Register 42h: Interrupt Status Register 2
Register
Address
Read/
Write
Register
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
42h
R
Interrupt Status Register 2
ERR2
ERR1
FAN4
FAN3
FAN2
FAN1
RES
12V
00h
The Interrupt Status Register 2 bits will be automatically set, by the LM85, whenever a fault condition is detected. Interrupt Status
Register 2 identifies faults caused by temperature sensor error, fan speed droping below minimum set by the tachometer
minimum register, the 12V input voltage going outside the window set by its limit registers. Interrupt Status Register 2 will hold
a set bit until the event is read by software. The contents of this register will be cleared (set to 0) automatically by the LM85 after
it is ready by software, if fault condition no longer exists. Once set, the Interrupt Status Register 2 bits will remain set until a read
event occurs, even if the fault no longer exists
This register is read only — a write to this register has no effect.
Bit
Name
R/W
Default
Description
0
+12V_Error
R
0
The LM85 automatically sets this bit to 1 when the 12V input voltage either
falls below the limit set in the 12V Low Limit register or exceeds the limit
set in the 12V High Limit register.
1
Reserved
R
0
Reserved
2
Fan1 Stalled
R
0
The LM85 automatically sets this bit to 1 when the TACH1 input reading is
above the value set in the Tach1 Minimum MSB and LSB registers.
3
Fan2 Stalled
R
0
The LM85 automatically sets this bit to 1 when the TACH2 input reading is
above the value set in the Tach2 Minimum MSB and LSB registers.
4
Fan3 Stalled
R
0
The LM85 automatically sets this bit to 1 when the TACH3 input reading is
above the value set in the Tach3 Minimum MSB and LSB registers.
5
Fan4 Stalled
R
0
The LM85 automatically sets this bit to 1 when the TACH4 input reading is
above the value set in the Tach4 Minimum MSB and LSB registers.
6
Remote Diode
1 Fault
R
0
The LM85 automatically sets this bit to 1 when there is either a short or
open circuit fault on the Remote1+ or Remote1 thermal diode input pins.
A diode fault will also set bit 4, Diode 1 Zone Limit bit, of Interrupt Status
Register 1.
7
Remote Diode
2 Fault
R
0
The LM85 automatically sets this bit to 1 when there is either a short or
open circuit fault on the Remote2+ or Remote2 thermal diode input pins.
A diode fault will also set bit 6, Diode 2 Zone Limit bit, of Interrupt Status
Register 1.
4.10 Register 43h: VID
Register
Address
Read/
Write
Register
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
43h
R
VID0–4
RES
VID4
VID3
VID2
VID1
VID0
The VID register contains the values of LM85 VID0–VID4 input pins. This register indicates the status of the VID lines that
interconnect the processor to the Voltage Regulator Module (VRM). Software uses the information in this register to determine the
voltage that the processor is designed to operate at. With this information, software can then dynamically determine the correct
values to place in the V
CCP Low Limit and VCCP High Limit registers.
This register is read only — a write to this register has no effect.
LM85
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