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| 型号： | LM92CIMX/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 11/25页 |
| 文件大小： | 1472K |
| 描述： | IC SENSOR TEMP/THERM COMP 8-SOIC |
| 标准包装： | 2,500 |
| 系列： | PowerWise® |
| 功能： | 温度监控系统（传感器） |
| 传感器类型： | 内部 |
| 感应温度： | -55°C ~ 150°C |
| 精确度： | ±1.5°C（最小值） |
| 拓扑： | ADC，比较器，寄存器库 |
| 输出类型： | 2 线串行，I²C? |
| 输出警报： | 是 |
| 输出风扇： | 无 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -55°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOP |
| 包装： | 带卷 (TR) |
| 其它名称： | *LM92CIMX *LM92CIMX/NOPB LM92CIMX LM92CIMX-ND LM92CIMX/NOPBTR |
LM 92
www.ti.com
SNIS110D MARCH 2000REVISED MARCH 2013
Table 2. Temperature Data Output (continued)
Temperature
Digital Output
Binary
Hex
+0.0625 癈
0 0000 0000 0001
00 01h
0 癈
00 0000 0000
00 00h
0.0625 癈
1 1111 1111 1111
1F FFh
25 癈
1 1110 0111 0000
1E 70h
55 癈
1 1100 1001 0000
1C 90h
SHUTDOWN MODE
Shutdown mode is enabled by setting the shutdown bit in the Configuration register via the Serial Bus. Shutdown
mode reduces power supply current to 5 礎 typical. T_CRIT_A is reset if previously set. Since conversions are
stopped during shutdown, T_CRIT_A and INT will not be operational. The Serial Bus interface remains active.
Activity on the clock and data lines of the Serial Bus may slightly increase shutdown mode quiescent current.
Registers can be read from and written to in shutdown mode. The LM92 takes milliseconds to respond to the
shutdown command.
INT AND T_CRIT_A OUTPUT
The INT and T_CRIT_A outputs are open-drain outputs and do not have internal pull-ups. A "high" level will not
be observed on these pins until pull-up current is provided from some external source, typically a pull-up resistor.
Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large
as possible. This will minimize any errors due to internal heating of the LM92. The maximum resistance of the
pull up, based on LM92 specification for High Level Output Current, to provide a 2 volt high level, is 30K ohms.
FAULT QUEUE
A fault queue of 4 faults is provided to prevent false tripping when the LM92 is used in noisy environments. The 4
faults must occur consecutively to set flags as well as INT and T_CRIT_A outputs. The fault queue is enabled by
setting bit 4 of the Configuration Register high (see CONFIGURATION REGISTER ).
Copyright ?20002013, Texas Instruments Incorporated
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