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参数资料
型号： LMK04033BISQX/NOPB
厂商： National Semiconductor
文件页数： 4/65页
文件大小： 0K
描述： IC CLOCK CONDITIONER PREC 48LLP
标准包装： 2,500
系列： PowerWise®
类型： 时钟调节器
PLL： 是
输入： LVCMOS
输出： LVCMOS，LVDS，2VPECL，LVPECL
电路数： 1
比率 - 输入:输出： 2:6
差分 - 输入:输出： 是/是
频率 - 最大： 2.16GHz
除法器/乘法器： 是/是
电源电压： 3.15 V ~ 3.45 V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 48-WFQFN 裸露焊盘
供应商设备封装： 48-LLP（7x7）
包装： 带卷 (TR)
其它名称： LMK04033BISQX
LMK04000, LMK04001, LMK04002, LMK04010
LMK04011, LMK04031, LMK04033
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
www.ti.com
Electrical Characteristics (continued)
(3.15 V
≤ VCC ≤ 3.45 V, -40 °C ≤ TA ≤ 85 °C. Typical values represent most likely parametric norms at VCC = 3.3 V, TA = 25
°C, at the Recommended Operating Conditions at the time of product characterization and are not guaranteed.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Internal VCO Closed Loop Phase Noise and Jitter Specifications using an Instrumentation Quality VCXO
Offset = 1 kHz
-111
Offset = 10kHz
-119
LMK040x0 (13)
Offset = 100 kHz
-121
fVCO = 1200 MHz
SSB Phase Noise
Offset = 1 MHz
-133
dBc/Hz
PLL2 = Closed Loop
Offset = 10 MHz
-157
Measured at Fout
Offset = 20 MHz
-162
Offset = 40 MHz
-165
Offset = 1 kHz
-110
Offset = 10 kHz
-117
LMK040x1 (14)
Offset = 100 kHz
-120
fVCO = 1500 MHz
SSB Phase Noise
Offset = 1 MHz
-132
dBc/Hz
PLL2 = Closed Loop
Offset = 10 MHz
-156
Measured at Fout
Offset = 20 MHz
-160
Offset = 40 MHz
-163
L(f)Fout
Offset = 1 kHz
-111
Offset = 10 kHz
-118
LMK040x2 (15)
Offset = 100 kHz
-120
fVCO = 1600 MHz
SSB Phase Noise
Offset = 1 MHz
-132
dBc/Hz
PLL2 = Closed Loop
Offset = 10 MHz
-156
Measured at Fout
Offset = 20 MHz
-162
Offset = 40 MHz
-165
Offset = 1 kHz
-107
Offset = 10 kHz
-114
LMK040x3 (16)
Offset = 100 kHz
-117
fVCO = 2000 MHz
SSB Phase Noise
Offset = 1 MHz
-126
dBc/Hz
PLL2 = Closed Loop
Offset = 10 MHz
-152
Measured at Fout
Offset = 20 MHz
-156
Offset = 40 MHz
-160
(13) For LMK040x0, fVCO = 1200 MHz. PLL1 is powered down. A 100 MHz Wenzel XO (model: 501-04623G) drives the OSCin input of
PLL2. PLL2 parameters: VCO_DIV = 3, N2 = 5, R2 = 1, FDET = 100 MHz, ICP2 = 1.6 mA, C1 = 22 pF, C2 = 5.6 nF, R2 = 1.8 kΩ, LBW =
268 kHz, PM = 75°. Wenzel XO phase noise: 100 Hz: -132 dBc/Hz; 1 kHz: -147 dBc/Hz; 10 kHz: -159 dBc/Hz; 100 kHz: -167 dBc/Hz.
(14) For LMK040x1, fVCO = 1500 MHz. PLL1 is powered down. A 100 MHz Wenzel XO (model: 501-04623G) drives the OSCin input of
PLL2. PLL2 parameters: VCO_DIV = 3, N2 = 5, R2 = 1, FDET = 100 MHz, ICP2 = 1.6 mA, C1 = 22 pF, C2 = 5.6 nF, R2 = 1.8 kΩ, LBW =
268 kHz, PM = 75°. Wenzel XO phase noise: 100 Hz: -132 dBc/Hz; 1 kHz: -147 dBc/Hz; 10 kHz: -159 dBc/Hz; 100 kHz: -167 dBc/Hz.
(15) For LMK040x2, fVCO = 1600 MHz. PLL1 is powered down. A 100 MHz Wenzel XO (model: 501-04623G) drives the OSCin input of
PLL2. PLL2 parameters: VCO_DIV = 2, N2 = 8, R2 = 1, FDET = 100 MHz, ICP2 = 1.6 mA, C1 = 22 pF, C2 = 5.6 nF, R2 = 1.8 kΩ, LBW =
252 kHz, PM = 76°. Wenzel XO phase noise: 100 Hz: -132 dBc/Hz; 1 kHz: -147 dBc/Hz; 10 kHz: -159 dBc/Hz; 100 kHz: -167 dBc/Hz.
(16) For LMK040x3, fVCO = 2000 MHz. PLL1 is powered down. A 100 MHz Wenzel XO (model: 501-04623G) drives the OSCin input of
PLL2. PLL2 parameters: VCO_DIV = 2, N2 = 10, R2 = 1, FDET = 100 MHz, ICP2 = 1.6 mA, C1 = 22 pF, C2 = 5.6 nF, R2 = 1.8 kΩ, LBW
= 434 kHz, PM = 69°. Wenzel XO phase noise: 100 Hz: -132 dBc/Hz; 1 kHz: -147 dBc/Hz; 10 kHz: -159 dBc/Hz; 100 kHz: -167 dBc/Hz.
12
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Copyright 2008–2011, Texas Instruments Incorporated
Product Folder Links: LMK04000 LMK04001 LMK04002 LMK04010 LMK04011 LMK04031 LMK04033
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