参数资料
型号: LMV1024URX
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 音频/视频放大
英文描述: PDM Output with Pre-Amplifier for Electret Microphones
中文描述: 2 CHANNEL, AUDIO AMPLIFIER, PBGA6
封装: 0.35 MM, LEAD FREE, MICRO SMD-6
文件页数: 11/18页
文件大小: 560K
代理商: LMV1024URX
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
2500V
Machine Model
250V
Supply Voltage
V
DD - GND
3.3V
Storage Temperature Range
65°C to 150°C
Junction Temperature (Note 6)
150°C max
Mounting Temperature
Infrared or Convection (20 sec.)
235°C
Operating Ratings (Note 1)
Supply Voltage
1.6V to 3.0V
Input Clock Frequency
400 kHz to 2.4 MHz
Duty Cycle
40% to 60%
Operating Temperature Range
40°C to 85°C
1.8V Electrical Characteristics (Note 3)
Unless otherwise specified, all limits are guaranteed for T
J = 25°C, VDD = 1.8V, VIN = 18 mVPP, fCLK = 1.2 MHz, Duty Cycle = 50%
and 100 nF capacitor between V
REF and GND. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(Note 4)
Typ
(Note 5)
Max
(Note 4)
Units
SNR
Signal to Noise Ratio
f
IN = 1 kHz, A-Weighted
59
dB
e
N
Digital Noise Floor (Integrated)
f = 20 Hz to 10 kHz, A-Weighted, 4.7 pF
Capacitor Connected from Input to
GND to Simulate ECM, No Signal
89
dBFS(A)
THD
Total Harmonic Distortion
f
IN = 1 kHz, VIN = 18 mVPP
0.03
%
I
DD
Supply Current
V
IN = GND, CLK = ON, High Impedance
Load (Note 7)
518
A
V
IN = GND, CLK = OFF
503
600
V
IL
CLOCK Input Logic Low Level
0.3
V
IH
CLOCK Input Logic High Level
1.5
V
OL
DATA Output Logic Low Level
0.1
V
OH
DATA Output Logic High Level
1.7
V
IN
Max Input Signal
f
IN = 1 kHz, THD < 1%
243
mV
PP
V
OUT
Max Output Signal
f
IN = 1 kHz, THD < 1%
6.8
dBFS
PSRR
Power Supply Rejection Ratio
V
IN = GND, Test Signal on VDD = 217
Hz, 100 mV
PP
100
dB
t
A
Time from CLOCK Transition to
DATA Becoming High Impedance
(See also Figure 10, Application
Section)
LMV1024: On Rising Edge of the
CLOCK
65
ns
LMV1026: On Falling Edge of the
CLOCK
t
B
Time from CLOCK Transition to
DATA Becoming Valid (See also
Figure 10, Application Section)
LMV1024: On Falling Edge of the
CLOCK
90
ns
LMV1026: On Rising Edge of the
CLOCK
C
IN
Input Capacitance
2
pF
R
IN
Input Impedance
1000
M
www.national.com
2
201334 Version 3 Revision 4
Print Date/Time: 2009/07/20 17:12:49
LMV1024/LMV1026
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