参数资料
型号: LMX2314M
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: XO, clock
英文描述: 1.2 GHz Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO16
封装: 0.150 INCH, PLASTIC, SO-16
文件页数: 2/20页
文件大小: 371K
代理商: LMX2314M
Connection Diagrams
LMX2314
TL/W/11766–2
JEDEC 16-Lead (0.150
×
Wide) Small
Outline Molded Package (M)
Order Number LMX2314M or LMX2314MX
See NS Package Number M16A
LMX2315
TL/W/11766–3
20-Lead (0.173
×
Wide) Thin Shrink
Small Outline Package (TM)
Order Number LMX2315TM or LMX2315TMX
See NS Package Number MTC20
Pin Descriptions
Pin No.
Pin No.
Pin Name
I/O
Description
2314
2315
2314/2315
1
1
OSC
IN
I
Oscillator input. A CMOS inverting gate input intended for connection to a crystal
resonator for operation as an oscillator. The input has a V
/2 input threshold and
can be driven from an external CMOS or TTL logic gate. May also be used as a
buffer for an externally provided reference oscillator.
2
3
OSC
OUT
V
P
V
CC
O
Oscillator output.
Power supply for charge pump. Must be
t
V
CC
.
Power supply voltage input. Input may range from 2.7V to 5.5V. Bypass capacitors
should be placed as close as possible to this pin and be connected directly to the
ground plane.
3
4
4
5
5
6
D
o
O
Internal charge pump output. For connection to a loop filter for driving the input of
an external VCO.
6
7
GND
Ground.
7
8
LD
O
Lock detect. Output provided to indicate when the VCO frequency is in ‘‘lock’’.
When the loop is locked, the pin’s output is HIGH with narrow low pulses.
8
10
f
IN
CLOCK
I
Prescaler input. Small signal input from the VCO.
9
11
I
High impedance CMOS Clock input. Data is clocked in on the rising edge, into the
various counters and registers.
10
13
DATA
I
Binary serial data input. Data entered MSB first. LSB is control bit. High impedance
CMOS input.
11
14
LE
I
Load enable input (with internal pull-up resistor). When LE transitions HIGH, data
stored in the shift registers is loaded into the appropriate latch (control bit
dependent). Clock must be low when LE toggles high or low. See Serial Data Input
Timing Diagram.
12
15
FC
I
Phase control select (with internal pull-up resistor). When FC is LOW, the polarity of
the phase comparator and charge pump combination is reversed.
X
16
BISW
O
Analog switch output. When LE is HIGH, the analog switch is ON, routing the
internal charge pump output through BISW (as well as through D
o
).
Monitor pin of phase comparator input. CMOS output.
13
17
f
OUT
w
p
O
14
18
O
Output for external charge pump.
w
p
is an open drain N-channel transistor and
requires a pull-up resistor.
15
19
PWDN
I
Power Down (with internal pull-up resistor).
PWDN
e
HIGH for normal operation.
PWDN
e
LOW for power saving.
Power down function is gated by the return of the charge pump to a TRI-STATE
condition.
16
20
w
r
NC
O
Output for external charge pump.
w
r
is a CMOS logic output.
No connect.
X
2,9,12
2
相关PDF资料
PDF描述
LMX2314MX 1.2 GHz Frequency Synthesizer for RF Personal Communications
LMX2315 Frequency Synthesizer for RF Personal Communications
LMX2315TM Frequency Synthesizer for RF Personal Communications
LMX2315TMX Frequency Synthesizer for RF Personal Communications
LMX2316 PLLatinum⑩ Low Power Frequency Synthesizer for RF Personal Communications
相关代理商/技术参数
参数描述
LMX2314MX 制造商:NSC 制造商全称:National Semiconductor 功能描述:1.2 GHz Frequency Synthesizer for RF Personal Communications
LMX2315 制造商:NSC 制造商全称:National Semiconductor 功能描述:1.2 GHz Frequency Synthesizer for RF Personal Communications
LMX2315D WAF 制造商:Texas Instruments 功能描述:
LMX2315TM 制造商:NSC 制造商全称:National Semiconductor 功能描述:1.2 GHz Frequency Synthesizer for RF Personal Communications
LMX2315TMX 功能描述:IC FREQ SYNTH 2.5GHZ 20-TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:PLLatinum™ 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:*