参数资料
型号: LNK354G
厂商: Power Integrations
文件页数: 5/16页
文件大小: 0K
描述: IC OFFLINE SWIT OCP HV 8SMD
标准包装: 50
系列: LinkSwitch®-HF
输出隔离: 隔离
频率范围: 186kHz ~ 214kHz
输出电压: 700V
功率(瓦特): 5W
工作温度: -40°C ~ 150°C
封装/外壳: 8-SMD(7 个接脚),鸥形翼
供应商设备封装: SMD-8B
包装: 管件
LNK353/354
Key Application Considerations
LinkSwitch-HF Design Considerations
Output Power Table
Data sheet maximum output power table (Table 1) represents
the maximum practical continuous output power level that can
be obtained under the following assumed conditions:
1. The minimum DC input voltage is 90 V or higher for 85 VAC
input, or 240 V or higher for 230 VAC input or 115 VAC
with a voltage doubler. The value of the input capacitance
should be large enough to meet these criteria for AC input
designs.
2. Secondary output of 5.5 V with a Schottky recti?er diode.
3. Assumed ef?ciency of 70%.
4. Operating frequency of f OSC(min) and I LIMIT(min) .
5. Voltage only output (no secondary side constant current
circuit).
6. Continuous mode operation (0.6 ≤ K P ≤ 1).
7. The part is board mounted with SOURCE pins soldered
to a suf?cient area of copper to keep the SOURCE pin
temperature at or below 100 °C.
8. Ambient temperature of 50 °C for open frame designs
and an internal enclosure temperature of 60 °C for adapter
designs.
Below a value of 1, K P is the ratio of ripple to peak primary
current. Above a value of 1, K P is the ratio of primary MOSFET
off time to the secondary diode conduction time.
Operating at a lower effective switching frequency can simplify
meeting conducted and radiated EMI limits, especially for
designs where the safety Y capacitor must be eliminated. By
using a lower effective full load frequency, the calculated
value of the primary inductance is higher than required for
power delivery. However, the maximum power capability at
this lower operating frequency will be lower than the values
shown in Table 1.
Audible Noise
The cycle skipping mode of operation used in LinkSwitch-HF
can generate audio frequency components in the transformer.
To limit this audible noise generation, the transformer should
be designed such that the peak core ?ux density is below
1250 Gauss (125 mT). Following this guideline and using the
standard transformer production technique of dip varnishing
practically eliminates audible noise. Higher ?ux densities
are possible however, careful evaluation of the audible noise
performance should be made using production transformer
samples before approving the design.
Ceramic capacitors that use dielectrics such as Z5U, when used
in clamp circuits, may also generate audio noise. If this is the
case, try replacing them with a capacitor having a different
dielectric, for example a polyester ?lm type.
LinkSwitch-HF Layout Considerations
See Figure 6 for a recommended circuit board layout for
LinkSwitch-HF .
Single Point Grounding
Use a single point ground connection from the input ?lter
capacitor to the area of copper connected to the SOURCE
pins.
Bypass Capacitor (C BP )
The BYPASS pin capacitor should be located as near as possible
to the BYPASS and SOURCE pins.
Primary Loop Area
The area of the primary loop that connects the input ?lter
capacitor, transformer primary and LinkSwitch-HF together
should be kept as small as possible.
Primary Clamp Circuit
A clamp is used to limit peak voltage on the DRAIN pin at turn
off. This can be achieved by using an RCD clamp (as shown
in Figure 5) or a Zener (~200 V) and diode clamp across the
primary winding. In all cases, to minimize EMI, care should be
taken to minimize the circuit path from the clamp components
to the transformer and LinkSwitch-HF .
Thermal Considerations
The copper area underneath the LinkSwitch-HF acts not only
as a single point ground, but also as a heatsink. As this area is
connected to the quiet source node, this area should be maximized
for good heatsinking of LinkSwitch-HF . The same applies to
the cathode of the output diode.
Y-Capacitor
The placement of the Y-capacitor should be directly from
the primary input ?lter capacitor positive terminal to the
common/return terminal of the transformer secondary. Such
a placement will route high magnitude common mode surge
currents away from the LinkSwitch-HF device. Note that if an
input π (C, L, C) EMI ?lter is used, then the inductor in the
?lter should be placed between the negative terminals of the
input ?lter capacitors.
Optocoupler
Place the optocoupler physically close to the LinkSwitch-HF to
minimize the primary side trace lengths. Keep the high current,
high voltage drain and clamp traces away from the optocoupler
to prevent noise pick up.
Output Diode
For best performance, the area of the loop connecting the
secondary winding, the output diode and the output ?lter
capacitor should be minimized. In addition, suf?cient copper
area should be provided at the anode and cathode terminals
F
2/05
5
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